Functional Design Errors in Digital Circuits

Diagnosis, Correction and Repair

  • Kai-hui Chang
  • Igor L. Markov
  • Valeria Bertacco

Part of the Lecture Notes in Electrical Engineering book series (LNEE, volume 32)

Table of contents

  1. Front Matter
    Pages I-XXIV
  2. Background and Prior Art

    1. Front Matter
      Pages 1-1
    2. Kai-hui Chang, Igor L. Markov, Valeria Bertacco
      Pages 3-12
    3. Kai-hui Chang, Igor L. Markov, Valeria Bertacco
      Pages 13-24
    4. Kai-hui Chang, Igor L. Markov, Valeria Bertacco
      Pages 25-33
  3. FogClear Methodologies and Theoretical Advances in Error Repair

    1. Front Matter
      Pages 35-35
    2. Kai-hui Chang, Igor L. Markov, Valeria Bertacco
      Pages 37-41
    3. Kai-hui Chang, Igor L. Markov, Valeria Bertacco
      Pages 43-49
    4. Kai-hui Chang, Igor L. Markov, Valeria Bertacco
      Pages 51-56
    5. Kai-hui Chang, Igor L. Markov, Valeria Bertacco
      Pages 57-74
  4. FogClear Components

    1. Front Matter
      Pages 75-75
    2. Kai-hui Chang, Igor L. Markov, Valeria Bertacco
      Pages 77-103
    3. Kai-hui Chang, Igor L. Markov, Valeria Bertacco
      Pages 105-131
    4. Kai-hui Chang, Igor L. Markov, Valeria Bertacco
      Pages 133-146
    5. Kai-hui Chang, Igor L. Markov, Valeria Bertacco
      Pages 147-166
    6. Kai-hui Chang, Igor L. Markov, Valeria Bertacco
      Pages 167-182
    7. Kai-hui Chang, Igor L. Markov, Valeria Bertacco
      Pages 183-185
  5. Back Matter
    Pages 187-200

About this book

Introduction

Due to the dramatic increase in design complexity, modern circuits are often produced with functional errors. While improvements in verification allow engineers to find more errors, fixing these errors remains a manual and challenging task. Functional Design Errors in Digital Circuits Diagnosis covers a wide spectrum of innovative methods to automate the debugging process throughout the design flow: from Register-Transfer Level (RTL) all the way to the silicon die. In particular, this book describes: (1) techniques for bug trace minimization that simplify debugging; (2) an RTL error diagnosis method that identifies the root cause of errors directly; (3) a counterexample-guided error-repair framework to automatically fix errors in gate-level and RTL designs; (4) a symmetry-based rewiring technology for fixing electrical errors; (5) an incremental verification system for physical synthesis; and (6) an integrated framework for post-silicon debugging and layout repair. In addition, Functional Design Errors in Digital Circuits Diagnosis describes a comprehensive evaluation of spare-cell insertion methods. The solutions provided in this book can greatly reduce debugging effort, enhance design quality, and ultimately enable the design and manufacture of more reliable electronic devices.

Keywords

Automatic debugging Error diagnosis Error repair Post-silicon debugging algorithms circuit design formal verification integrated circuit layout simulation verification

Authors and affiliations

  • Kai-hui Chang
    • 1
  • Igor L. Markov
    • 1
  • Valeria Bertacco
    • 1
  1. 1.Dept. Electrical Engineering & Computer ScienceUniversity of MichiganAnn ArborUSA

Bibliographic information

  • DOI https://doi.org/10.1007/978-1-4020-9365-4
  • Copyright Information Springer Netherlands 2009
  • Publisher Name Springer, Dordrecht
  • eBook Packages Engineering
  • Print ISBN 978-1-4020-9364-7
  • Online ISBN 978-1-4020-9365-4
  • Series Print ISSN 1876-1100
  • Series Online ISSN 1876-1119
  • About this book