Design, Automation, and Test in Europe

The Most Influential Papers of 10 Years Date

  • Rudy Lauwereins
  • Jan Madsen

Table of contents

  1. Front Matter
    Pages i-xii
  2. System Level Design

    1. Petru Eles, Krzysztof Kuchcinski, Zebo Peng, Alexa Doboli, Paul Pop
      Pages 15-29
    2. Ashok Halambi, Peter Grun, Vijay Ganesh, Asheesh Khare, Nikil Dutt, Alex Nicolau
      Pages 31-45
    3. Andreas Gerstlauer, Haobo Yu, Daniel D. Gajski
      Pages 47-58
    4. Marek Jersak, Rafik Henia, Rolf Ernst
      Pages 59-72
    5. Hyeonjoong Cho, Binoy Ravindran, E. Douglas Jensen
      Pages 73-85
  3. Networks on Chip

    1. Giovanni De Micheli
      Pages 105-110
    2. Pierre Guerrier, Alain Greiner
      Pages 111-123
    3. E. Rijpkema, K. G. W. Goossens, A. Rădulescu, J. Dielissen, J. van Meerbergen, P. Wielage et al.
      Pages 125-139
    4. Antoine Jalabert, Srinivasan Murali, Luca Benini, Giovanni De Micheli
      Pages 157-171
    5. Shankar Mahadevan, Federico Angiolini, Jens Sparsø, Michael Storgaard, Jan Madsen, Rasmus Grøndahl Olsen
      Pages 173-184
  4. Modeling, Simulation and Run-Time Management

    1. Eui-Young Chung, Luca Benini, Alessandro Bogliolo, Giovanni De Micheli
      Pages 195-206
    2. Yung-Hsiang Lu, Eui-Young Chung, Tajana Šimunić, Luca Benini, Giovanni De Micheli
      Pages 207-219
    3. Bruno Bougard, Francky Catthoor, Denis C. Daly, Anantha Chandrakasan, Wim Dehaene
      Pages 221-234
    4. Kai Chen, Janos Sztipanovits, Sandeep Neema
      Pages 253-265

About this book

Introduction

The Design, Automation and Test in Europe (DATE) conference celebrated in 2007 its tenth anniversary. As a tribute to the chip and system-level design and design technology community, this book presents a compilation of the three most influential papers of each year. This provides an excellent historical overview of the evolution of a domain that contributed substantially to the growth and competitiveness of the circuit electronics and systems industry.

The papers were grouped in six sections:

  • System Level Design;
  • Networks on Chip;
  • Modeling, Simulation and Run-Time Management;
  • Digital Systems in CMOS and Beyond;
  • Physical Design and Validation; and
  • Test and Verification.

The winners of the prestigious EDAA Lifetime Achievement Award as well as other recognized experts in their field wrote an introduction to each section, summarizing the history in their domain and indicating how the selected DATE papers contributed to it.

Keywords

CMOS Embedded System IEEE 80 circuit compiler digital system electronics embedded systems interconnect network on chip (NoC) optimization power management router routing simulation

Editors and affiliations

  • Rudy Lauwereins
    • 1
  • Jan Madsen
    • 2
  1. 1.IMEC vzw and Katholieke UniversiteitLeuvenBelgium
  2. 2.Informatics and Mathematical ModellingTechnical University of DenmarkDenmark

Bibliographic information

  • DOI https://doi.org/10.1007/978-1-4020-6488-3
  • Copyright Information Springer Netherlands 2008
  • Publisher Name Springer, Dordrecht
  • eBook Packages Engineering
  • Print ISBN 978-1-4020-6487-6
  • Online ISBN 978-1-4020-6488-3