Advertisement

Logic and Architecture Synthesis

State-of-the-art and novel approaches

  • Gabrièle Saucier
  • Anne Mignotte

Table of contents

  1. Front Matter
    Pages N1-xii
  2. Logic Minimization Based on BDD

    1. Front Matter
      Pages 1-1
    2. F. Poirot, G. Tarroux, R. Roane
      Pages 3-14
    3. Bernd Wurth, Norbert Wehn
      Pages 15-25
  3. Cell Assignment Based on BDD

    1. Front Matter
      Pages 39-39
    2. Alexander I. Kornilov, Tatiana Yu Isaeva
      Pages 64-69
    3. Dirk Möller, Paul Molitor, Rolf Drechsler
      Pages 70-81
  4. Partitioning and Clustering for Programmable Devices

    1. Front Matter
      Pages 83-83
    2. Ulrich Weinmann, Wolfgang Rosenstiel
      Pages 85-96
    3. G. Saucier, D. Brasen, J. P. Hiol
      Pages 97-106
  5. Logic Synthesis for Programmable Devices

    1. Front Matter
      Pages 107-107
    2. T. Łuba, H. Selvaraj, M. Nowicka, A. Kraśniewski
      Pages 109-115
    3. Ulf Schlichtmann
      Pages 116-123
    4. M. Robert, L. Torres, F. Moraes, D. Auvergne
      Pages 124-135
  6. Structural Optimization

    1. Front Matter
      Pages 137-137
    2. Z. Sahraoui, L. Rijnders, J. Vanhoof, I. Bolsens, H. De Man
      Pages 139-150
    3. R. X. T. Nijssen, J. A. G. Jess
      Pages 151-157
    4. E. Fehlauer, St Rülke, G. Franke
      Pages 158-165
  7. Controllers

    1. Front Matter
      Pages 167-167
    2. H. A. Hilderink, J. A. G. Jess
      Pages 169-175
    3. Hichem Belhadj, Aziz Fortas, Gabrièle Saucier
      Pages 176-182
    4. Zafar Hasan, Maciej J. Ciesielski
      Pages 197-208
  8. Control Part and Operative Part

    1. Front Matter
      Pages 209-209
    2. Kunihiro Asada, Makoto Ikeda, Junichi Akita
      Pages 211-222
    3. B. Rouzeyre, D. Dupont
      Pages 223-229
  9. Link to Libraries

    1. Front Matter
      Pages 231-231
    2. Peter Marwedel, Birger Landwehr
      Pages 233-244
    3. P. Jha, C. Ramachandran, F. Kurdahi, N. Dutt
      Pages 252-258
  10. Operator Type Selection

    1. Front Matter
      Pages 259-259
    2. Anne Mignotte, Jean Michel Muller, Olivier Peyran
      Pages 268-279
    3. Alain Guyot, Mohammed Belrhiti, Gilles Bosco
      Pages 280-286
  11. High Level Synthesis

    1. Front Matter
      Pages 287-287
    2. Norbert Wehn
      Pages 289-299
    3. I. C. Kraljić, G. M. Quénot, B. Zavidovique
      Pages 300-306
    4. J. L. Philippe, O. Sentieys, J. P. Diguet, E. Martin
      Pages 307-313
  12. Applicative Studies

    1. Front Matter
      Pages 321-321
    2. P. Vanoostende, G. Van Wauwe
      Pages 323-329
    3. José A. Tierno, Alain J. Martin, Drazen Borkovic, Tak K. Lee
      Pages 330-336
  13. Communication Busses

  14. System Level Synthesis

    1. Front Matter
      Pages 353-353

About this book

Introduction

This book describes several methods and systems solving one of the highlighted problems within computer aided design, namely architectural and logic synthesis. The book emphasises the most recent technologies in high level synthesis, concentrating on applicative studies and practical constraints or criteria during synthesis. Logic and Architecture Synthesis concentrates on the practical problems involving automatic synthesis of designs. It is essential reading for researchers and CAD Managers working in this area.

Keywords

ASIC CAD Design FPGA Field Programmable Gate Array RAM ROM VHDL VLSI algorithms architecture metal-oxide-semiconductor transistor microprocessor optimization static-induction transistor

Editors and affiliations

  • Gabrièle Saucier
    • 1
  • Anne Mignotte
    • 1
  1. 1.Institut National Polytechnic de GrenobleGrenobleFrance

Bibliographic information

  • DOI https://doi.org/10.1007/978-0-387-34920-6
  • Copyright Information Springer-Verlag US 1995
  • Publisher Name Springer, Boston, MA
  • eBook Packages Springer Book Archive
  • Print ISBN 978-1-5041-2923-7
  • Online ISBN 978-0-387-34920-6
  • Series Print ISSN 1868-4238
  • Series Online ISSN 1868-422X
  • Buy this book on publisher's site