Book Volume 32 2006

Fault-Tolerance Techniques for SRAM-based FPGAs

Authors:

ISBN: 978-0-387-31068-8 (Print) 978-0-387-31069-5 (Online)

Table of contents (10 chapters)

  1. Front Matter

    Pages i-xiii

  2. No Access

    Chapter

    Pages 1-8

    Introduction

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    Chapter

    Pages 9-27

    Radiation Effects in Integrated Circuits

  4. No Access

    Chapter

    Pages 29-71

    Single Event Upset (SEU) Mitigation Techniques

  5. No Access

    Chapter

    Pages 73-82

    Architectural SEU Mitigation Techniques

  6. No Access

    Chapter

    Pages 83-90

    High-Level SEU Mitigation Techniques

  7. No Access

    Chapter

    Pages 91-110

    Triple Modular Redundancy (TMR) Robustness

  8. No Access

    Chapter

    Pages 111-121

    Designing and Testing a TMR Micro-Controller

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    Chapter

    Pages 123-141

    Reducing TMR Overheads: Part I

  10. No Access

    Chapter

    Pages 143-170

    Reducing TMR Overheads: Part II

  11. No Access

    Chapter

    Pages 171-174

    Final Remarks

  12. Back Matter

    Pages 175-183