Power-Aware Computer Systems

First International Workshop,PACS 2000 Cambridge, MA, USA, November 12, 2000 Revised Papers

  • Babak Falsafi
  • T. N. Vijaykumar
Conference proceedings PACS 2000

Part of the Lecture Notes in Computer Science book series (LNCS, volume 2008)

Table of contents

  1. Front Matter
    Pages I-X
  2. Power-Aware Microarchitectural/Circuit Techniques

    1. Zhenyu Tang, Norman Chang, Shen Lin, Weize Xie, Sam Nakagawa, Lei He
      Pages 13-24
    2. Alper Buyuktosunoglu, Stanley Schuster, David Brooks, Pradip Bose, Peter Cook, David Albonesi
      Pages 25-39
  3. Application/Compiler Optimizations

    1. P. Marchal, C. Wong, A. Prayati, N. Cossement, F. Catthoor, R. Lauwereins et al.
      Pages 40-50
    2. Chung-Hsing Hsu, Ulrich Kremer, Michael Hsiao
      Pages 65-81
  4. Exploiting IPC/Memory Slack

    1. Stefanos Kaxiras, Zhigang Hu, Girija Narlikar, Rae McLellan
      Pages 82-96
  5. Power/Performance Models and Tools

    1. Ashutosh Dhodapkar, Chee How Lim, George Cai, W. Robert Daasch
      Pages 112-125
    2. David Brooks, Margaret Martonosi, John-David Wellman, Pradip Bose
      Pages 126-136
    3. Soraya Ghiasi, Dirk Grunwald
      Pages 137-151
  6. Back Matter
    Pages 153-153

About these proceedings


The phenomenal increases in computer system performance in recent years have been accompanied by a commensurate increase in power and energy dissipation. The latter has directly resulted in demand for expensive packaging and cooling technology, an increase in product cost, and a decrease in product reliability in all segments of the computing market. Moreover, the higher power/energy dissipation has signi cantly reduced battery life in portable systems. While - stem designers have traditionally relied on circuit-level techniques to reduce - wer/energy, there is a growing need to address power/energy dissipation at all levels of the computer system. We are pleased to welcome you to the proceedings of the Power-Aware C- puter Systems (PACS 2000) workshop. PACS 2000 was the rst workshop in its series and its aim was to bring together experts from academia and industry to address power-/energy-awareness at all levels of computer systems. In these p- ceedings, we bring you several excellent research contributions spanning a wide spectrum of areas in power-aware systems, from application all the way to c- pilers and microarchitecture, and to power/performance estimating models and tools. We have grouped the contributions into the following speci c categories: (1) power-aware microarchitectural/circuit techniques, (2) application/compiler power optimizations, (3) exploiting opportunity for power optimization in - struction scheduling and cache memories, and (4) power/performance models and tools.


Energy Dissipation Low-Power Devices Modeling Power Dissipation Power-Aware Computer Systems Power-Aware Computing Power-Performance Analysis compiler computer optimization tools

Editors and affiliations

  • Babak Falsafi
    • 1
  • T. N. Vijaykumar
    • 2
  1. 1.Department of Electrical and Computer EngineeringCarnegie Mellon UniversityPittsburghUSA
  2. 2.School of Electrical and Computer EngineeringPurdue UniversityW.LafayetteUSA

Bibliographic information

  • DOI
  • Copyright Information Springer-Verlag Berlin Heidelberg 2001
  • Publisher Name Springer, Berlin, Heidelberg
  • eBook Packages Springer Book Archive
  • Print ISBN 978-3-540-42329-4
  • Online ISBN 978-3-540-44572-2
  • Series Print ISSN 0302-9743
  • Buy this book on publisher's site