Interconnect Noise Optimization in Nanometer Technologies

  • Mohamed A. Elgamel
  • Magdy A. Bayoumi

About this book

Introduction

Interconnect has become the dominating factor in determining system performance in nanometer technologies. Dedicated to this subject, Interconnect Noise Optimization in Nanometer Technologies provides insight and intuition into layout analysis and optimization for interconnect in high speed, high complexity integrated circuits.

The authors bring together a wealth of information presenting a range of CAD algorithms and techniques for synthesizing and optimizing interconnect. Practical aspects of the algorithms and the models are explained with sufficient details. The book investigates the most effective parameters in layout optimization. Different post-layout optimization techniques with complexity analysis and benchmarks tests are provided. The impact crosstalk noise and coupling on the wire delay is analyzed. Parameters that affect signal integrity are also considered.

Keywords

3D CAD algorithms complexity computer-aided design (CAD) integrated circuit layout metal-oxide-semiconductor transistor optimization simulation

Authors and affiliations

  • Mohamed A. Elgamel
    • 1
  • Magdy A. Bayoumi
    • 1
  1. 1.The Center for Advanced Computer StudiesUniversity of Louisiana at LafayetteLafayetteUSA

Bibliographic information

  • DOI https://doi.org/10.1007/0-387-29366-3
  • Copyright Information Springer Science+Business Media, Inc. 2006
  • Publisher Name Springer, Boston, MA
  • eBook Packages Engineering
  • Print ISBN 978-0-387-25870-6
  • Online ISBN 978-0-387-29366-0