Study of Multi-twin Defects Generated in GaAs and InP Films on Nanopatterned Si via Transmission Electron Microscopy


We investigated defect generation in GaAs and InP on various blanket Si substrates and Si patterns with nanosized trench structures via transmission electron microscopy. The dependences of types of defects on the substrate orientation and the pattern size in GaAs and InP on nanosized patterns were analyzed. Defects that formed in a specific direction, and shapes similar to those stacking faults or twin boundaries (TWs) were confirmed. Moreover, we observed that unusual directional defects could not be effectively trapped by using aspect ratio trapping techniques owing to their various angles. The multi-twin (M-TW) angles generated from the original TW were calculated and projected in a pole figure by using the stereographic projection technique. Moreover, M-TW defects were illustrated via 3D computer graphics simulations.

This is a preview of subscription content, log in to check access.


  1. [1]

    P. Paufler, Z. Kristallogr. 190, 155 (1990).

    Article  Google Scholar 

  2. [2]

    E. Orowan, Proc. Phys. Soc. 52, 8 (1940).

    ADS  Article  Google Scholar 

  3. [3]

    R. W. Cahn, Adv. Phys. 3, 363 (1954).

    ADS  Article  Google Scholar 

  4. [4]

    J. E. Aycrs, J. Cryst. Growth 135, 71 (1994).

    ADS  Article  Google Scholar 

  5. [5]

    J. R. Patel and A. R. Chaudhuri, J. Appl. Phys. 34, 2788 (1963).

    ADS  Article  Google Scholar 

  6. [6]

    B. Qu et al., J. Cryst. Growth 226, 57 (2001).

    ADS  Article  Google Scholar 

  7. [7]

    S. M. Hu, J. Vac. Sci. Technol. 14, 17 (1976).

    ADS  Article  Google Scholar 

  8. [8]

    M. Chu, Y. Sun, U. Aghoram and S. E. Thompson, Annu. Rev. Mater. Res. 39, 203 (2009).

    ADS  Article  Google Scholar 

  9. [9]

    R. Chau, S. Datta and A. Majumdar, in IEEE Compound Semiconductor Integrated Circuit Symposium, 2005 (Palm Springs, CA, USA, Oct. 30–Nov. 2, 2005).

    Google Scholar 

  10. [10]

    T. Ashley et al., in Proceeding of Int. Conf. Solid-State Integr. Circuits Technol. Proceedings, ICSICT, 3 (Beijing, China, Oct. 18–21, 2004).

  11. [11]

    R. Chau et al., IEEE Trans. Nanotechnol. 4, 153 (2005).

    ADS  Article  Google Scholar 

  12. [12]

    S. Datta et al., in Proceedings of IEEE International Electron Devices Meeting (Washington, DC, USA, Dec. 5 to 7, 2005).

  13. [13]

    M. Yamaguchi et al., Appl. Phys. Lett. 53, 2293 (1988).

    ADS  Article  Google Scholar 

  14. [14]

    Z. I. Kazi et al., Jpn. J. Appl. Phys. 40, 4093 (2001).

    ADS  Article  Google Scholar 

  15. [15]

    M. E. Groenert et al., J. Appl. Phys. 93, 362 (2003).

    ADS  Article  Google Scholar 

  16. [16]

    N. Hayafuji et al., Jpn. J. Appl. Phys. 29, 2371 (1990).

    ADS  Article  Google Scholar 

  17. [17]

    R. N. Ghosh, B. Griffing and J. M. Ballantyne, Appl. Phys. Lett. 48, 370 (1986).

    ADS  Article  Google Scholar 

  18. [18]

    J. S. Park et al., Appl. Phys. Lett. 90, 052113 (2007).

    ADS  Article  Google Scholar 

  19. [19]

    J. Z. Li et al., Appl. Phys. Lett. 91, 021114 (2007).

    ADS  Article  Google Scholar 

  20. [20]

    J. Z. Li et al., ECS Trans. 18, 887 (2009).

    Article  Google Scholar 

  21. [21]

    S. W. Kim et al., J. Cryst. Growth 401, 319 (2014).

    ADS  Article  Google Scholar 

  22. [22]

    Y. D. Cho et al., ECS J. Solid State Sci. Technol. 5, P409 (2016).

    Article  Google Scholar 

  23. [23]

    A. W. Bett, F. Dimroth, G. Stollwerck and O. V. Sulima, Appl. Phys. A 69, 119 (1999).

    ADS  Article  Google Scholar 

  24. [24]

    C. Sun, E. Müller, M. Meffert and D. Gerthsen, Adv. Struct. Chem. Imaging 5, 1 (2019).

    Article  Google Scholar 

  25. [25]

    H. Hofmeister, Encycl. Nanosci. Nanotechnol. 3, 22 (2003).

    Google Scholar 

  26. [26]

    C. Palache, J. Chem. Inf. Model. 53, 1689 (2013).

    Article  Google Scholar 

Download references


This study was financially supported by the IT R&D program of Ministry of Knowledge Economy/Korea Evaluation Institute of Industrial Technology (10067739, Development of Core Technologies for <5-nm Next-Generation Logic Devices).

Author information



Corresponding author

Correspondence to Dae-Hong Ko.

Rights and permissions

Reprints and Permissions

About this article

Verify currency and authenticity via CrossMark

Cite this article

Lee, J., Shin, H., Lee, IG. et al. Study of Multi-twin Defects Generated in GaAs and InP Films on Nanopatterned Si via Transmission Electron Microscopy. J. Korean Phys. Soc. 77, 592–597 (2020).

Download citation


  • GaAs
  • InP
  • Twin
  • Stacking fault
  • Multi-twin
  • defect
  • ART
  • TEM