Application of Paris’s law to thermal cycling-induced failure in semiconductor device patterns

Abstract

The present work provides a semi-empirical model to show that the growth rate of thermal displacement-induced cracks in semiconductor devices depends on pattern thickness. Paris’s law is adopted to characterize the growth rate of cracks during thermal-cycling. The crack propagation rate is estimated from the semi-empirical relation (dc/dN)_v=C(ΔK)ⁿ, where ΔK indicates the range of an applied stress intensity factor, and C is a scaling constant. The applied stress intensity factor is related to the initial crack length as ΔK=YΔσ(πc)^1/2, where σ represents the thermal displacement-induced normal stress, c describes the pre-existing crack length, and Y is a geometrical factor. The resulting crack growth rate can be expressed as a function of device pattern thickness: dc/dN∞(1/t)^m, where t describes the pattern thickness, and m is another constant. The present semi-empirical results showing the relationship between the crack growth rate and pattern thickness indicate that if a semiconductor device pattern becomes thinner by 68%, its susceptibility to thermal cycling-induced damage will be enhanced by 76%.