A schematic gate-controlled thyristor model

Abstract

A schematic macromodel of a gate-controlled thyristor is considered. The model is designed with separate control and power circuits. In the static operation mode, it reproduces the forward and reverse current-voltage characteristics of the thyristor. This model is unique, because it adequately simulates thyristor energizing and deenergizing. The processes correctly shown at energizing are upon delay and regeneration of charge carriers. The processes simulated at turnoff include forward current fall, reverse current rise, and restoration of reverse blocking ability and controllability. A technique of calculating the thyristor model parameters using reference data is suggested. A setup of the thyristor model in the Matlab & Simulink environment is presented. In terms of external structure, the schematic model is identical with the built-in ideal thyristor model in the Sim Power Systems library. The results of simulating processes in the thyristor in the standard switchover mode, switching failure mode, and thyristor break mode are presented. The simulation results appear to correlate with the thyristor reference data in the same test conditions.