Radioelectronics and Communications Systems

, Volume 62, Issue 3, pp 134–141 | Cite as

Ultra-Low Power High-Input Impedance Subthreshold CMOS Neural Front-End Amplifier

  • Sadeque Reza KhanEmail author
  • Iram NadeemEmail author


An ultra-low power, voltage-mode front-end amplifier (FEA) for neural applications featuring subthreshold design is presented. This has been a topic of much research in implantable medical prosthetic devices during the past few decades to monitor and treat the neural disorders such as hearing or sight dysfunctions, epilepsy, Parkinson’s disease, paralysis. The FEA performs a critical signal detection operation in neural monitoring systems to ensure the biosignal fidelity. A matched double-MOS feedback technique is used to compensate the input leakage currents generated by low noise amplifier in the form of integrated circuit (IC), which is the primary reason for immense signal leakage in the input bias network. Therefore, this loop topology ensures that FEA maintains high impedance across a wide range of input frequency. The proposed FEA is implemented by using an SK Hynix 0.18 µm CMOS process. This IC consumes 320 nW in the area of 0.016 mm2 and achieves the input impedance of 44.9 GΩ, and the input-referred noise of 153 nV/Hz1/2.


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  1. 1.
    K. Rajabpour-Moghaddam, A. Mohammadi, “A wireless multi-channel implantable neural recording microsystem based on optimized analog TDM-FDM combination,” AEU — Int. J. Electron. Commun. 77, 130 (2017). DOI: Scholar
  2. 2.
    Y.-S. Sung, W.-M. Chen, C.-Y. Wu, “The design of 8-channel CMOS area-efficient low-power current-mode analog front-end amplifier for EEG signal recording,” Proc. of IEEE Int. Symp. On Circuits and Systems, 22–25 May 2016, Montreal, Canada (IEEE, 2016), pp. 530–533. DOI: Scholar
  3. 3.
    Z. Zhou, P. A. Warr, “Back-gate current neutralisation feedback loop for high-input impedance neural FEAs,” Electron. Lett. 52, No. 19, 1586 (2016). DOI: Scholar
  4. 4.
    F. Zhang, J. Holleman, B. P. Otis, “Design of ultra-low power biopotential amplifiers for biosignal acquisition applications,” IEEE Trans. Biomed. Circuits Syst. 6, No. 4, 344 (2012). DOI: Scholar
  5. 5.
    D. Y. Barsakcioglu, Yan Liu, P. Bhunjun, J. Navajas, A. Eftekhar, A. Jackson, R. Q. Quiroga, T. G. Constandinou, “An analogue front-end model for developing neural spike sorting systems,” IEEE Trans. Biomed. Circuits Syst. 8, No. 2, 216 (2014). DOI: Scholar
  6. 6.
    S. Borisov, A. S. Korotkov, “Procedure for building a MOS transistor high frequency small-signal model,” Radioelectron. Commun. Syst. 53, No. 7, 356 (2010). DOI: Scholar
  7. 7.
    A. Demosthenous, I. Pachnis, D. Jiang, N. Donaldson, “An integrated amplifier with passive neutralization of myoelectric interference from neural recording tripoles,” IEEE Sens. J. 13, No. 9, 3236 (2013). DOI: Scholar
  8. 8.
    P. Mohseni, K. Najafi, “A fully integrated neural recording amplifier with DC input stabilization,” IEEE Trans. Biomed. Eng. 51, No. 5, 832 (2004). DOI: Scholar
  9. 9.
    R. R. Harrison, C. Charles, “A low-power low-noise CMOS amplifier for neural recording applications,” IEEE J. Solid-State Circuits 38, No. 6, 958 (2003). DOI: Scholar
  10. 10.
    G. Ferrari, M. Farina, F. Guagliardo, M. Carminati, M. Sampietro, “Ultra-low-noise CMOS current preamplifier from DC to 1 MHz,” Electron. Lett. 45, No. 25, 1278 (2009). DOI: Scholar
  11. 11.
    L. Magnelli, F. A. Amoroso, F. Crupi, G. Cappuccino, G. Iannaccone, “Design of a 75-nW, 0.5-V subthreshold complementary metal-oxide-semiconductor operational amplifier,” Int. J. Circuit Theory Appl. 42, No. 9, 967 (2014). DOI: Scholar
  12. 12.
    T. Nevalainen, T. Koivisto, M. Pankaala, “Subthreshold nano-watt front-end amplifier for wireless ECG applications,” Proc. of 32nd NORCHIP Conf. Nord Microelectron. Event, 27–28 Oct. 2014, Tampere, Finland (IEEE, 2015), pp. 1–4. DOI: Scholar
  13. 13.
    Z. Zhou, P. A. Warr, “A high input impedance low noise integrated front-end amplifier for neural monitoring,” IEEE Trans. Biomed. Circuits Syst. 10, No. 6, 1 (2016). DOI: Scholar
  14. 14.
    C.-Y. Wu, W.-M. Chen, L.-T. Kuo, “A CMOS power-efficient low-noise current-mode front-end amplifier for neural signal recording,” IEEE Trans. Biomed. Circuits Syst. 7, No. 2, 107 (2013). DOI: Scholar
  15. 15.
    R. Shulyzki, K. Abdelhalim, A. Bagheri, M. T. Salam, C. M. Florez, J. L. P. Velazquez, P. L. Carlen, R. Genov, “320-channel active probe for high-resolution neuromonitoring and responsive neurostimulation,” IEEE Trans. Biomed. Circuits Syst. 9, No. 1, 34 (2015). DOI: Scholar
  16. 16.
    A. Abdi, H.-K. Cha, “A bidirectional neural interface CMOS analog front-end IC with embedded isolation switch for implantable devices,” Microelectronics J. 58, 70 (2016). DOI: Scholar

Copyright information

© Allerton Press, Inc. 2019

Authors and Affiliations

  1. 1.Herijot-Watt UniversityEdinburghUK
  2. 2.Chosun UniversityGwangjuSouth Korea

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