A high performance simulation methodology for multilevel grid-connected inverters
- 273 Downloads
To design a high reliability multilevel grid-connected inverter, a high performance simulation methodology based on Saber is proposed. The simulation methodology with optimized simulation speed can simulate the factors that have significant impacts on the stability and performance of the control system, such as digital delay, dead band, and the quantization error. The control algorithm in the simulation methodology is implemented using the C language, which facilitates the future porting to an actual system since most actual digital controllers are programmed in the C language. The modeling of the control system is focused mainly on diode-clamped three-level grid-connected inverters, and simulations for other topologies can be easily built based on this simulation. An example of designing a proportional-resonant (PR) controller with the aid of the simulation is introduced. The integer scaling effect in fixed-point digital signal processors (DSPs) on the control system is demonstrated and the performance of the controller is validated through experiments.
Key wordsMultilevel grid-connected inverter Simulation methodology Proportional-resonant (PR) controller
Unable to display preview. Download preview PDF.
- Bao, W.B., Bao, J.Y., 2010. Modeling and Simulation of Multilevel Current Source Inverter Based on SIMetrix/SIMPLIS. Int. Conf. on Computer Application and System Modeling, p.466–470. [doi:10.1109/ICCASM.2010.5620416]Google Scholar
- Castoldi, M.F., Aguiar, M.L., Junior, A.A.O., Monteiro, J.R.B.A., 2006. A Rapid Prototype Design to Investigate the FPGA-Based DTC Strategy Applied to the Speed Control of Induction Motors. IEEE Int. Conf. on Industrial Technology, p.955–960. [doi:10.1109/ICIT.2006.372304]Google Scholar
- Chwirka, S., 2000. Using the Powerful SABER Simulator for Simulation, Modeling, and Analysis of Power Systems, Circuits, and Devices. 7th Workshop on Computers in Power Electronics, p.172–176. [doi:10.1109/CIPE.2000.904711]Google Scholar
- Haghdar, K., Shayanfar, H.A., Alavi, M.H.S., 2011. Selective Harmonics Elimination of Multi Level Inverters via Methods of GPS, SA and GA. Asia-Pacific Power and Energy Engineering Conf., p.1–5. [doi:10.1109/APPEEC.2011.5749056]Google Scholar
- Jiang, S., Liang, J., Liu, Y., Yamazaki, K., Fujishima, M., 2005. Modeling and Cosimulation of FPGA-Based SVPWM Control for PMSM. 31st Annual Conf. of IEEE Industrial Electronics Society, p.1538–1543. [doi:10.1109/IECON.2005.1569133]Google Scholar
- Lu, S., Corzine, K.A., Fikse, T.H., 2005. Advanced Control of Cascaded Multilevel Drives Based on P-Q Theory. IEEE Int. Conf. on Electric Machines and Drives, p.1415–1422. [doi:10.1109/IEMDC.2005.195907]Google Scholar
- Nichols, K.G., Lin, J.T., Brown, A.D., Kazmierski, T.J., Zwolinski, M., 1993. Reliability of Circuit-Level Simulation. IEE Colloquium on Surviving Problems in Circuit Evaluation, p.1–4.Google Scholar
- Nussbaumer, T., Heldwein, M.L., Gong, G., Kolar, J.W., 2005. Prediction Techniques Compensating Delay Times Caused by Digital Control of a Three-Phase Buck-Type PWM Rectifier System. 40th Annual Meeting of Industry Applications Conf., p.923–927. [doi:10.1109/IAS.2005.1518454]Google Scholar
- Sepahvand, H., Ferdowsi, M., Corzine, K.A., 2011. Fault Recovery Strategy for Hybrid Cascaded H-Bridge Multi-level Inverters. 26th IEEE Applied Power Electronics Conf. and Exposition, p.1629–1633. [doi:10.1109/APEC.2011.5744813]Google Scholar
- Tehrani, K.A., Rasoanarivo, I., Barrandon, L., Hamzaoui, M., Sargos, F.M., Rafiei, M., 2010. A New Current Control Using Two Hysteresis Modulation for a New 3-Level Inverter. 12th Int. Conf. on Optimization of Electrical and Electronic Equipment, p.652–658. [doi:10.1109/OPTIM.2010.5510355]Google Scholar