Abstract
Capacitors represent the largest obstacle to dynamic random-access memory (DRAM) technology evolution because the capacitor properties govern the overall operational characteristics of DRAM devices. Moreover, only the atomic layer deposition (ALD) technique is used for the dielectric and electrode because of its extreme geometry. Various high-k materials deposited by ALD have been investigated for further scaling. Whereas past investigations focused on increasing the physical thickness of the dielectric to suppress leakage current, the physical thickness of the dielectric should also be limited to a few nanometers in design rules less than 1×-nm. Therefore, a new way to overcome the limitations of traditional approaches based on thorough understanding of high-k materials is highly recommended to enhance the properties of conventional materials and provide directions for developing new materials. In this review, previously reported results are discussed, and suggestions are made for further investigations for DRAM capacitor applications.
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Acknowledgment
This work was supported by the National Research Foundation of Korea (NRF) grant funded by the Korean government (MSIT) (No. 2018R1C1B5045854), and the Industrial Strategic Technology Development Program (20003555, Development of SrTiO3BaTiO3 superlattice highk films for next generation DRAM capacitor) funded by the Ministry of Trade, Industry & Energy (MOTIE, Korea).
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Jeon, W. Recent advances in the understanding of high-k dielectric materials deposited by atomic layer deposition for dynamic random-access memory capacitor applications. Journal of Materials Research 35, 775–794 (2020). https://doi.org/10.1557/jmr.2019.335
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DOI: https://doi.org/10.1557/jmr.2019.335