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Bias Temperature Instability (BTI) in high-mobility channel devices with high-k dielectric stacks: SiGe, Ge, and InGaAs

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Abstract

We present a review of our recent studies of Bias Temperature Instability (BTI) in Metal-Oxide-Semiconductor Field-Effect-Transistors (MOSFETs) fabricated with different material systems, highlighting the reliability opportunities and challenges of each novel device family. We discuss first the intrinsic reliability improvement offered by SiGe and Ge p-channel technologies, if a Si cap is used to passivate the channel, in order to fabricate a standard SiO2/HfO2 gate stack. We focus on SiGe gate stack optimizations for maximum BTI reliability, and on a simple physics-based model able to reproduce the experimental trends. This model framework is then used to understand the suboptimal BTI reliability and excessive time-dependent variability induced by oxide defect charging in different high-mobility channel gate stacks, such as Ge/GeOx/high-k and InGaAs/high-k. Finally we discuss how to pursue a reduction of charge trapping in alternative material systems in order to boost the device reliability and minimize time-dependent variability.

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Franco, J., Kaczer, B., Vais, A. et al. Bias Temperature Instability (BTI) in high-mobility channel devices with high-k dielectric stacks: SiGe, Ge, and InGaAs. MRS Advances 1, 3329–3340 (2016). https://doi.org/10.1557/adv.2016.387

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  • DOI: https://doi.org/10.1557/adv.2016.387

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