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Elimination of slip lines in capless rapid thermal annealing of GaAs

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Abstract

A new rapid thermal annealing (RTA) procedure has been developed that eliminates the problem of crystallographic slip in 2 in, ion-implanted GaAs wafers. This annealing arrangement is easy to implement and is reliable. A precision machined graphite support structure and guard ring are used to insure uniform cooling across the entire wafer, thus eliminating slip line production. Characteristics of silicon ion implants have been determined using van der Pauw Hall, Polaron C–V profiling, and eddy current resistivity measurements. Characterization showed excellent dopant activation and uniformity can be achieved using this new technique. Low-temperature photoluminescence measurements were performed on samples annealed with and without graphite in the system, and no detectable difference in surface carbon contamination was found.

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Authors and Affiliations

  1. GE Company, Electronics Laboratory, Electronics Parkway, Syracuse, 13221, New York, USA

    Michael J. Goff, Sujane C. Wang & Tan-Hua Yu

Authors
  1. Michael J. Goff
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  2. Sujane C. Wang
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  3. Tan-Hua Yu
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Goff, M.J., Wang, S.C. & Yu, TH. Elimination of slip lines in capless rapid thermal annealing of GaAs. Journal of Materials Research 3, 911–913 (1988). https://doi.org/10.1557/JMR.1988.0911

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  • DOI: https://doi.org/10.1557/JMR.1988.0911

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