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ASMD‒FSMD Technique in Designing Signal Processing Devices on Field Programmable Gate Arrays

  • THEORY AND METHODS OF SIGNAL PROCESSING
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Abstract

The algorithmic state machine with a datapath (ASMD)‒finite state machine with a datapath (FSMD) technique for designing digital devices is discussed, in which the operation of a device is described in the form of a block diagram of a state machine with a datapath. Different techniques for designing digital devices are compared by the examples of synchronous multipliers and peripheral interface controller (PIC) processors on field programmable gate arrays (FPGAs). It is shown that the ASMD‒FSMD technique, in contrast to the conventional approach, in most cases makes it possible to reduce the sales value (by 47% for particular examples) and significantly enhance the speed (by a factor of 2.96 for particular examples), as well as to essentially shorten the design time (by a factor of 5‒7). Recommendations on using the ASMD‒FSMD technique are given and possible directions for its further development are pointed.

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Funding

This study was supported in part by the Bialystok University of Technology (Bialystok, Poland), project no. WZ/WI-IIT/4/2020.

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Authors and Affiliations

  1. Belarusian State Academy of Communications, 220076, Minsk, Belarus

    V. V. Solov’ev

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  1. V. V. Solov’ev
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Correspondence to V. V. Solov’ev.

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Translated by E. Bondareva

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Solov’ev, V.V. ASMD‒FSMD Technique in Designing Signal Processing Devices on Field Programmable Gate Arrays. J. Commun. Technol. Electron. 66, 1336–1345 (2021). https://doi.org/10.1134/S1064226921120184

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  • DOI: https://doi.org/10.1134/S1064226921120184

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