Abstract
A setup for the measurement of the stability margin of an immittance AND gate is proposed. The feasibility of the measurement method, which is applicable regardless of whether the gate is stable or potentially unstable, is validated.
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Original Russian Text © N.A. Filynyuk, L.B. Lishchynskaya, R.Yu. Chekhmestruk, 2018, published in Radiotekhnika i Elektronika, 2018, Vol. 63, No. 4, pp. 384–390.
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Filynyuk, N.A., Lishchynskaya, L.B. & Chekhmestruk, R.Y. Measurement of the Stability Margin of an Immittance Logic Gate. J. Commun. Technol. Electron. 63, 393–398 (2018). https://doi.org/10.1134/S1064226918040058
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DOI: https://doi.org/10.1134/S1064226918040058