Abstract
The results of computational modeling of the ionization response in VLSI elements under the ingress of a separate charged particle into its passive or active region are presented. In this study, the conditions for the appearance of multibit upsets, which are formed due to the diffusion collection mechanism of the excess charge, are substantiated. It is shown that the maximal VLSI sensitivity to multiple since upsets occurs with the ingress of a nuclear particle into passive regions arranged equidistantly from the location of a nuclear particle.
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Original Russian Text © A.I. Chumakov, 2014, published in Mikroelektronika, 2014, Vol. 43, No. 2, pp. 83–87.
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Chumakov, A.I. Evaluation of multibit upsets in integrated circuits under heavy charged particles. Russ Microelectron 43, 91–95 (2014). https://doi.org/10.1134/S1063739714020048
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DOI: https://doi.org/10.1134/S1063739714020048