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Mapping loop nests to multipipelined architecture

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Abstract

Mapping of non-perfectly nested loops onto a multipipelined architecture is considered. Formulas for the delays between the pipeline starting times are obtained. Graph models of programs (data dependence graph, lattice graph, and computation graph) are used.

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Authors and Affiliations

  1. Southern Federal University, ul. Bolshaya Sadovaya 105/42, Rostov-on-Don, 344006, Russia

    R. B. Steinberg

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  1. R. B. Steinberg
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Correspondence to R. B. Steinberg.

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Original Russian Text © R.B. Steinberg, 2010, published in Programmirovanie, 2010, Vol. 36, No. 3.

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Steinberg, R.B. Mapping loop nests to multipipelined architecture. Program Comput Soft 36, 177–185 (2010). https://doi.org/10.1134/S0361768810030060

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  • DOI: https://doi.org/10.1134/S0361768810030060

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