Skip to main content
Log in

Localization of faulty multi-output unit in discrete device

  • Safety, Viability, Reliability, Technical Diagnostics
  • Published:
Automation and Remote Control Aims and scope Submit manuscript

Abstract

The matrix method for localization of a faulty block that was proposed earlier by the present author was considered as applied to a discrete device with multi-output blocks At that, the question of reducing the amount of the test hardware was solved by constructing appropriately the matrix of block outputs. An algorithm for such construction was given.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Similar content being viewed by others

References

  1. Gupta, S., Feng, S., Ansari, A., et al., StageNet: A Reconfigurable Fabric for Constructing Dependable CMPs, IEEE Trans. Comput., 2011, vol. 60, no. 1, pp. 5–19.

    Article  MathSciNet  Google Scholar 

  2. Banerjee, P., Sangtani, M., and Sur-Kolay, S., Floorplanning for Partially Reconfigurable FPGAs, IEEE Trans. Comput. Aided Design Integr. Circuits Syst., 2011, vol. 30, no. 3, pp. 8–17.

    Article  Google Scholar 

  3. Tang, X. and Wang, S., A Low Hardware Overhead Self-diagnosis Technique Using Reed-Solomon Codes for Self-repairing Chips, IEEE Trans. Comput., 2010, vol. 59, no. 10, pp. 1309–1319.

    Article  MathSciNet  Google Scholar 

  4. Huang, Y.-J. and Li, J.-F., Built-in Self-repair Scheme for the TSVs in 3-D Ics, IEEE Trans. Comput. Aided Design Integr. Circuits Syst., 2012, vol. 31, no. 10, pp. 1600–1612.

    Article  Google Scholar 

  5. Lach, J., Mangione-Smith, W.H., and Potkonjak, M., Low Overhead Fault-Tolerant FPGA Systems, IEEE Trans. Very Large-Scale Integrat. (VLSI) Syst., 1998, vol. 6, no. 2, pp. 212–221.

    Article  Google Scholar 

  6. Uvarov, S.S., Design of the EFPGA-based Reconfigurable Fault-tolerant Systems with Cell-level Redundancy, Autom. Remote Control, 2007, vol. 68, no. 9, pp. 1631–1642.

    Article  MATH  Google Scholar 

  7. Aksenova, G.P., A Matrix Method for FPGA Failure Localization, Autom. Remote Control, 2013, vol. 74, no. 9, pp. 1525–1529.

    Article  MATH  Google Scholar 

  8. Yarmolik, V.N., Kontrol’ i diagnostika tsifrovykh uzlov EVM (Testing and Diagnosis of Computer Digital Units), Minsk: Nauka i Tekhnika, 1988, pp. 137–235.

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to G. P. Aksenova.

Additional information

Original Russian Text © G.P. Aksenova, 2015, published in Avtomatika i Telemekhanika, 2015, No. 2, pp. 141–149.

Rights and permissions

Reprints and permissions

About this article

Check for updates. Verify currency and authenticity via CrossMark

Cite this article

Aksenova, G.P. Localization of faulty multi-output unit in discrete device. Autom Remote Control 76, 304–310 (2015). https://doi.org/10.1134/S0005117915020095

Download citation

  • Received:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1134/S0005117915020095

Keywords

Navigation