Russian Microelectronics

, Volume 47, Issue 7, pp 516–521 | Cite as

Solving the Problems of Routing Interconnects with a Resynthesis for Reconfigurable Systems on a Chip

  • S. V. GavrilovEmail author
  • D. A. Zheleznikov
  • V. M. Khvatov


The existing means of design automation are focused mainly on the technology of foreign manufacturers, which makes it necessary to adapt the existing methods and means for designing reconfigurable systems-on-a-chip and to develop domestic specialized CAD tools to solve urgent problems in this field. Methods are proposed for solving interconnection routing problems in conjunction with logical resynthesis, applied to the architecture of a reconfigurable system-on-a-chip based on the domestic field-programmable gate array (FPGA) of the Almaz-14 family. Developers from JSC “NIIME” and PJSC “Micron” laid broad configurational solutions, which do not have foreign analogues, into this crystal. A wide range of additional elements for the configuration, as well as the potentialities for the logical resynthesis of the FPGA Almaz-14 chip, have led to the need to develop new methods for routing interconnections that would allow us to take into account and use these architectural features. An efficient algorithm for the automatic routing of interconnections for a reconfigurable system on a chip based on FPGAs belonging to the Almaz-14 family based on algorithm A* is developed. This algorithm represents a modification of the classical algorithm searching for the shortest path on a graph, the Dijkstra algorithm, including a mixed switching graph model. To describe the variety of additional switching elements, a special generalized mathematical model, as well as a special interface in the command language Tcl are developed, the latter includes a list of elements for configuration, as well as their description and functional purpose. This work has increased the efficiency of computer-aided design using programmed mechanisms developed and implemented in the C programming language for the optimal use of the configuration and routing elements of FPGAs, as well as mechanisms for the complete and entire routing of interconnections.


interconnection routing computer-aided design field-programmable gate array (FPGA) logical resynthesis 



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Copyright information

© Pleiades Publishing, Ltd. 2018

Authors and Affiliations

  • S. V. Gavrilov
    • 1
    Email author
  • D. A. Zheleznikov
    • 1
    • 2
  • V. M. Khvatov
    • 1
    • 2
  1. 1.Institute of Design Problems in Microelectronics, Russian Academy of SciencesMoscowRussia
  2. 2.National Research University MIETMoscowRussia

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