Programming and Computer Software

, Volume 33, Issue 5, pp 272–282 | Cite as

The use of contract specifications for representing requirements and for functional testing of hardware models

  • V. P. IvannikovEmail author
  • A. S. Kamkin
  • A. S. Kossatchev
  • V. V. Kuliamin
  • A. K. Petrenko


Contract specifications in the form of pre-and postconditions are widely used in software engineering for formal description of interfaces of software components. On the one hand, such specifications are convenient for the developers since they can easily be attached to the system architecture. On the other hand, test oracles verifying conformance of the behavior of the target system to the specifications can automatically be generated from them. In the paper, it is suggested to use contract specifications for representing requirements and for functional testing of hardware models developed in languages such as VHDL, Verilog, SystemC, System Verilog, etc. An approach to specification of such systems is proposed and compared with the existing methods of hardware specification. An experience of its practical use is described. The approach is based on the UniTESK testing technology developed at the Institute for System Programming.


Target System Linear Temporal Logic Register Transfer Level Computation Tree Logic Hardware Description Language 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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  1. 1.
    Statistical Analysis of Floating Point Flaw in the Pentium Processor, Intel Corporation, 1994.Google Scholar
  2. 2.
    Beizer, B., The Pentium Bug—An Industry Watershed, Testing Techniques Newsletter (TTN). Online Edition, 1995.Google Scholar
  3. 3.
    Wolfe, A., For Intel, It’s a Case of FPU All Over Again, EE Times, 1997.Google Scholar
  4. 4.
    Meyer, B., Design by Contract, Tech. Report TR-EI-12/CO, Interactive Software Engineering Inc., 1986.Google Scholar
  5. 5.
    Meyer, B., Applying “Design by Contract”, IEEE Comput., 1992, vol. 25, no. 10.Google Scholar
  6. 6.
    Keating, M. and Bricaud, P., Reuse Methodology Manual for System-on-a-Chip Designs, Kluwer, 2002.Google Scholar
  7. 7.
    Nemudrov, V. and Martin, G., Sistemy-na-kristalle. Proektirovanie i razvitie (Systems-on-a-Chip. Design and Development), Moscow: Tekhnosfera, 2004.Google Scholar
  8. 8.
    Barantsev, A.V., Bourdonov, I.B., Demakov, A.V., Zelenov, S.V., Kossatchev., A.S., Kuliamin, V.V., Omel’chenko, V.A., Pakulin, N.V., Petrenko, A.K., and Khoroshilov, A.V., UniTesK Approach to Test Development: Achievements and Perspectives,
  9. 9.
    IEEE Standard VHDL Language Reference Manual, IEEE Std 1076-1987.Google Scholar
  10. 10.
    IEEE Standard Hardware Description Language Based on the Verilog Hardware Description Language, IEEE Std 1364-1995.Google Scholar
  11. 11.
  12. 12.
  13. 13.
  14. 14.
  15. 15.
    Bourdonov, I., Kossatchev, A., Kuliamin, V., and Petrenko, A., UniTesK Test Suite Architecture, Lecture Notes in Computer Science (FME’2002), Springer, 2002, vol. 2391.Google Scholar
  16. 16.
    Khoroshilov, A.V., Specification and Testing of Systems with Asynchronous Interface, Preprint of Inst. of System Programming RAN, Moscow, 2006, no. 12,
  17. 17.
    Ivannikov, V.P., Kamkin, A.S., Kuliamin, V.V., and Petrenko, A.P., Applying UniTESK Technology to Functional Testing of Hardware Models, Preprint of Inst. of System Programming RAN, Moscow, 2005, no. 8,
  18. 18.
    Kamkin, A., The UniTESK Approach to Specification-Based Validation of Hardware Designs, IEEE-ISoLA 2006: The 2nd Int. Symp. on Leveraging Applications of Formal Methods, Verification and Validation, 2006.Google Scholar
  19. 19.
    Edwards, S.A., Design and Verification Languages, Tech. Report, New York, Columbia University, 2004.Google Scholar
  20. 20.
    Armoni, R., Fix, L., Flaisher, A., Gerth, R., Ginsburg, B., Kanza, T., Landver, A., Mador-Haim, S., Singerman, E., Tiemeyer, A., Vardi, M., and Zbar, Y., The ForSpec Temporal Logic: A New Temporal Property-Specification Language, in Tools and Algorithms for Construction and Analysis of Systems, 2002.Google Scholar
  21. 21.
    Beer, I., Ben-David, S., Eisner, C., Fisman, D., Gringauze, A., and Rodeh, Y., The Temporal Logic Sugar, Lecture Notes in Computer Science, 2001.Google Scholar
  22. 22.
  23. 23.
    OpenVera® Language Reference Manual: Assertions, Version 1.4.1, 2004.Google Scholar
  24. 24.
    OpenVera® Assertions. Blueprint for Productivity and Product Quality, 2003,
  25. 25.
  26. 26.
    MIPS64T Architecture for Programmers, Revision 2.0, MIPS Technologies Inc., 2003.Google Scholar

Copyright information

© Pleiades Publishing, Ltd. 2007

Authors and Affiliations

  • V. P. Ivannikov
    • 1
    Email author
  • A. S. Kamkin
    • 1
  • A. S. Kossatchev
    • 1
  • V. V. Kuliamin
    • 1
  • A. K. Petrenko
    • 1
  1. 1.Institute for System ProgrammingRussian Academy of SciencesMoscowRussia

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