By integrating memristor arrays with CMOS circuitry, a computing-in-memory architecture can be created that could provide efficient deep neural network processors.
References
LeCun, Y., Bengio, Y. & Hinton, G. Nature 521, 436–444 (2015).
Nurvitadhi, E. et al. Int. Symp. Field-Programmable Gate Arrays (FPGA) 5–14 (ACM, 2017).
Jouppi, N. P. et al. Int. Symp. Computer Architecture (ISCA) 1–12 (ACM/IEEE, 2017).
Xu, X. et al. Nat. Electron. 1, 216–222 (2018).
Chi, P. et al. Int. Symp. Computer Architecture (ISCA) 27–39 (ACM/IEEE, 2016).
Yang, J. J., Strukov, D. B. & Stewart, D. R. Nat. Nanotechnol. 8, 13–24 (2013).
Ambrogio, S. et al. Nature 558, 60–67 (2018).
Prezioso, M. et al. Nature 521, 61–64 (2015).
Ankit, A. et al. Int. Conf. Architectural Support for Programming Languages and Operating Systems (ASPLOS) 715–731 (ACM, 2019).
Chen, W.-H. et al. Nat. Electron. https://doi.org/10.1038/s41928-019-0288-0 (2019).
Author information
Authors and Affiliations
Corresponding author
Rights and permissions
About this article
Cite this article
Jiang, W., Xie, B., Liu, CC. et al. Integrating memristors and CMOS for better AI. Nat Electron 2, 376–377 (2019). https://doi.org/10.1038/s41928-019-0307-1
Published:
Issue Date:
DOI: https://doi.org/10.1038/s41928-019-0307-1
- Springer Nature Limited
This article is cited by
-
A co-design framework of neural networks and quantum circuits towards quantum advantage
Nature Communications (2021)
-
In-memory computing with emerging nonvolatile memory devices
Science China Information Sciences (2021)
-
Hardware design and the competency awareness of a neural network
Nature Electronics (2020)