Abstract
Atomic defects are easily created in the single-layer electronic devices of current interest and cause even more severe influence than in the bulk devices since the electronic quantum paths are obviously suppressed in the two-dimensional transport. Here we find a drop of chemical solution can repair the defects in the single-layer MoSe2 field-effect transistors. The devices’ room-temperature electronic mobility increases from 0.1 cm2/Vs to around 30 cm2/Vs and hole mobility over 10 cm2/Vs after the solution processing. The defect dynamics is interpreted by the combined study of the first-principles calculations, aberration-corrected transmission electron microscopy, and Raman spectroscopy. Rich single/double Selenium vacancies are identified by the high-resolution microscopy, which cause some mid-gap impurity states and localize the device carriers. They are found to be repaired by the processing with the result of extended electronic states. Such a picture is confirmed by a 1.5 cm−1 red shift in the Raman spectra.
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Introduction
The new family of two-dimensional (2D) transition metal dichalcogenides materials, such as MoS2, WS2 and WTe2, has attracted enormous interest nowadays due to their excellent optical response,1,2,3,4 electronic control,4,5,6 layer-number controlled electronic structure,6,7,8 and extra valley degree of freedom2, 9,10,11,12 etc.13 Among them, research attention on MoSe2 is rising because of its high photo-responsivity and tunable excitonic charges.5, 14,15,16,17 It best matches the solar spectrum with its bandgap of 1.5 eV. This leads to the potential applications in optoelectronic devices, such as single-junction solar cells18 and photoelectrochemical devices, based on single-layer MoSe2 (SLM) with a direct bandgap and an even higher optical coupling strength.14 Large SLM sheets with the dimension over 100 μm have been grown by chemical vapor deposition (CVD) method,19 based on which the vertical Van der Waals heterostructure devices are fabricated with the demonstration of rapid charge transfer in 50 fs.20 The field-effect transistors (FET) based on both exfoliated and CVD grown SLM sheets have been fabricated, whose on/off ratio reaches 10.5, 6, 19 Lateral heterostructures including MoSe2–WSe2 and MoSe2–MoS2 have been grown, based on which the lateral p-n junctions were fabricated with a very long interlayer excitonic lifetime of 1.8 ns.21 Fast phototransistors have been demonstrated with the CVD-grown SLM sheets, whose response time is shorter than 25 ms.22
However, the state-of-art single-layer devices are much more fragile than the bulk devices because even very careful fabrication often causes atomic defects and vacancies in the atomic layers.23,24,25,26,27,28 The defects also cause more severe influence on the device performance since the quantum paths are greatly suppressed in the 2D electronic transport.23, 24, 29 For the SLM FET, such defects lead to various carrier mobilities,19, 24, 30,31,32,33 and defect repairing is the focus of concern during these years.17, 28, 34, 35 Here we report that a simple drop of chemical solution may repair the defect-rich SLM FET, by which the carrier mobility increases from 0.1 to around 30 cm2/Vs. The aberration-corrected high resolution transmission electron microscopy (HRTEM), Raman scattering, and density functional theory (DFT) calculations reveal the defect dynamics for the Selenium (Se) vacancy repair, which suggests the localization source of the transport carriers.
Results
Improved carrier mobility in slm field-effect transistors after the processing
The SLM sheets are grown by the CVD approach,19 whose optical micrographs are shown in Fig. 1a. We can see that the length scale of the sheets is around 100 μm. Our SLM sheets may reach 300–400 μm in dimension. They are often of triangular shapes and very pale color contrast on the 500 nm oxide silicon wafers. Fig. 1b shows the atomic force microscopic image of our samples, where the thickness of 0.8 nm is read according to the line profile, as shown in the inset. Fig. 1c shows the SLM and ethylenediaminetetra acetic acid (EDTA) disodium salt molecule model.
Standard 2-probe electrodes are made to fabricate a field-effect transistor on selected monolayer sheets by the electron beam lithography technique. In Fig. 2a, the measured current (I sd ) is plotted against the applied voltage (V sd ) for a typical sample measured at room temperature (300K), where I sd is the source-drain current and V sd is the source-drain voltage. I sd increases from 10−13A at the gate voltage of −40 V to the order of 10−9A at 40 V. The data exhibit the typical FET output curves and depict the SLM’s n-type transport behavior. A Schottky contact is clearly shown since the output line is not straight, based on which the contact barrier of 800 meV is extracted.36 Such situation was observed in CVD-grown MoS2 devices.23 The high resistance up to 109 Ω even at gate voltage of 40 V and a low mobility of 0.1 cm2/Vs reveal the strong Anderson localization of the transport carriers. This is far lower than the predicted extreme value37 and indicates that high density of defects have been generated during the growth and fabrication processing. Such strong localization was identified in previous single layer MoS2 devices since the defect interaction becomes stronger in reduced dimensions.23, 24
Processing the device by a drop of EDTA disodium salt solution (0.2 mol/L in deionized water) improves the electronic transport as displayed in Fig. 2. The processed sheet is kept in fuming cupboard for hours to dry off. The Schottky contact remains for the processed devices since the output line is not straight at zero back voltage, as shown in Fig. 2b. We measure the transfer curves of the devices before and after the processing, which show the data of log (I sd ) as a function of V g at room temperature (300K), where V g is the gate voltage. As shown in Fig. 2c, both the curves present the on/off states at negative gate voltage and positive gate voltage, respectively. At the given V sd of 0.5 V, for the unprocessed sheet, I sd is on the order of 10−10 at gate voltage of −5 V, and I sd increases by one order of magnitude to 10−9A at 20 V. After the EDTA processing, although the off current is still 10−10A, the on current comes to above 10−7A at the same gate voltage. It is 2–3 orders of magnitude larger than the values of the unprocessed ones. The ON/OFF ratio of the device may reach 104 at 20 V and we can expect an even higher ON/OFF ratio with a larger gate voltage. A linear trend governs between 17 and 20 V, by which we can calculate the field effect mobility by μ = L/W*(dG/dVg)/Ci 24 where L is the distance between two probes, W is the sample width. For this device, the L/W ratio is 3, C i = 6.96 nFcm−2 is the gate capacitance for 500 nm SiO2 dielectric layer, G = I sd /V sd where V sd is the source-drain voltage. We find that the unprocessed sample presents the mobility of 0.1 cm2/Vs while the processed sample holds the mobility of 30 ± 6 cm2/Vs (consider the contact resistance).31, 38,39,40,41 It shows great mobility improvement by 2–3 orders of magnitude after the EDTA processing. It it noted that the device is turned on when back gate voltage is positive, which is the signature of the electron dominance and the mobility data obtained above are for electrons. Since EDTA is an electron donor, we also estimate the carrier density of the device. It reveals the several times increase of the Fermi level after the processing.
Unlike MoS2, MoSe2 can be tuned to p-type transport when applying a negative back voltage.14 We can’t see the p-transport transition in the unprocessed SLM sheet even at the gate voltage up to −150 V. This might be due to the hybridization of the defect states. However, such a tune can be achieved easily after the EDTA processing even at a very low back voltage. The EDTA processing may improve the hole mobility by 3 orders of magnitude from 0.01 and below to 10 cm2/Vs. Fig. 2d shows I sd as a function of V g for the unprocessed and processed samples at room temperature. We can see from the I sd -V g characteristics that I sd improves by 2 orders of magnitude when the gate voltage changes from 0 to −5 V for processed ones, which indicates the p-type transport. The hole mobility is calculated to raise from a value below 0.1 cm2/Vs for the unprocessed samples to about 10 cm2/Vs for the processed ones, similarly seen in some recent work.22 The observation of the p-type transport property in our SLM indicates that the localized states are suppressed.
Discussion
We find the EDTA molecules improve the properties of the SLM sheets rather than the contact between the metal electrodes and the sheets. In Fig. 2e, we show the data of Schottky barriers of a series of different samples at various gate voltages, calculated by U s = k B T/(-e)·ln(I 0 /SA *·T 2),36 where k B is the Boltzmann constant, T is temperature, e means electron charge, S is the area of probes, A * is the Richard constant A * = 55 A cm−2 K−2 and I 0 is the point of intersection of ln I and the y-axis in the output characteristics. We can see that the data of U s scatter around 0.6–0.8 V, where no significant difference is found between the processed and unprocessed samples. The Schottky barrier height of the processed devices can be either higher or lower than the unprocessed ones, depending on different devices. This indicates that the contact is not systematically improved after the processing. Therefore, it is convinced that the EDTA molecules improve the electronic localization and introduce the n-type carriers.
The Se vacancies and their repair, revealed by aberration-corrected HRTEM and Raman spectroscopy
The aberration-corrected HRTEM is employed to study the defect states of the device before/after the EDTA processing, as shown in Fig. 3. Before the processing (Fig. 3a), the HRTEM reveals beautiful lattices in the monolayer sheet, indicating its genuine crystalline condition. Distinguished from their neighbors, some very dark features appear as marked by red arrows and magnified in Fig. 3a. After the EDTA processing, the HRTEM reveals only some scattered features with white spots among the triangular region, as marked by the green arrows shown in Fig. 3b. Such HRTEM features have long been considered as the images of some atomic defects in other materials.24, 27, 42 We propose several atomic defect models and simulate their HRTEM images by the software Web-EMAPS.43 We find that the SLM sheet with a double Se vacancy and the SLM sheet with an EDTA-filled Se vacancy can interpret reasonably the two defect images, respectively. As seen in the simulated image in Fig. 3c, the enhanced dark triangle corresponds to the vacant point in the double vacancy model, which is similar to the observed features in Fig. 3a. This is reasonable since there are so many Se vacancies in our CVD-grown SLM sheet that some of them form double Se vacancies. The very low mobility is thus explained. Fig. 3d shows a model of EDTA-filled Se vacancy and its simulated HRTEM image. One may see a brighter triangular spot corresponding to the EDTA-filled vacancy. Similar features can be seen in Fig. 3b as stated above. This means that the EDTA molecules repair the Se vacancies efficiently during the processing.
This picture is confirmed by the Raman measurement as shown in Fig. 4a, in which the Raman feature appears at 240.2 cm−1. It is believed to be the characteristic peak of MoSe2 44 and shifted to 238.7 cm−1 after the processing. This is consistent with the repair model. We calculate the phonon dispersion curves of unprocessed and processed MoSe2, as shown in Fig. 4b, in which the Raman active modes (A′1) at the Γ point are presented. It can be vividly observed that the A′1 modes shift to lower frequencies at the Γ point after the processing, which is consistent with our experimental results. A simple picture is that the Raman shift characterizes the phonon scattering, and the phonon frequency is related to the mass of atomic chains. The repairing of the Se vacancy tunes the resonant frequency and leads to the observed Raman shift. This is consistent with the picture in literature.17
The defect repair dynamics from the first-principles calculations
The DFT calculations complete the Se vacancy repair scenario. The model is a supercell consisting of 4 × 4 SLM unit cells with a single Se vacancy, as shown in Fig. 1c. The attachment of the EDTA molecule is found to connect by the COO– bond and form two Mo–O bonds with the Mo atoms around the Se vacancy. In fact, various models of EDTA adsorption have been tried, including a pristine EDTA molecule adsorbed on the surface of pure MoSe2 or MoSe2 with a Se vacancy, where most of them present a very weak binding strength. The calculated electronic structure is shown in Fig. 5a, in which some flat bands arise in the bandgap (denoted by red curves). These localized bands are contributed by the three Mo atoms around the Se vacancy, which is clearly reflected by partial charge density distribution, as shown in the inset of Fig. 5a. This means that the existence of Se vacancies in SLM sheet leads to the formation of strongly localized states. After the adsorption of EDTA molecule, the flat impurity bands are broadened, meaning that these bands become much more delocalized. Meanwhile, the Fermi level is found to lift up a bit after the repair. We are therefore convinced that the repair of the Se vacancy leads to the improvement of the carrier mobility and the increased Fermi level.
In conclusion, we have repaired the fragile SLM FET using a simple EDTA processing, evidenced with the enhancement of the carrier mobility by several orders of magnitude. Both the electron and hole mobilities are improved. HRTEM and Raman studies have revealed the repair of the single/double Se vacancies, which localize the electronic transport in the single layer devices. The scenario is completed by the DFT calculations. This work will further pave the advance of the SLM applications in practical devices.
Methods
The sample growth and processing
We use CVD to synthesize the SLM sheets, where Se pellets (Alfa Aesar 99.99%) and molybdenum oxide (Alfa Aesar, 99.5%) power are used as Se and Mo precursors. They are placed in two different quartz boats and Se power is on the windward side. A clean Si wafer with a 500 nm (or 300 nm) SiO2 layer is placed face down on the Mo boat. The Mo boat is then put at the center of the heating furnace. During the whole reaction, Ar/H2 gas flux is kept at 50 sccm as the carrier gas. The furnace temperature is held at 30 °C for 1 h in order to remove O2. Then we raise the furnace to 720 °C with a heating ramp of 24 °C/min. After half an hour, the furnace is kept at 720 °C for 12 min and cooled down to room temperature. The whole reaction is carried on ambient pressure. The EDTA solution is dropped on the device.
The characterization and HRTEM simulation
The HRTEM is carried out in a FEI Titan Cubed 60–300 machine. The acceleration voltage of 60 V is used at the magnification of 107. The Raman spectroscopy is carried out in an NT-MDT NANOFI NEDR-300. All the transport measurement is carried out in a home-made system with a Keithley 4200 and a Keithley 6430. The HRTEM simulation is carried out in a standard electron microscopy application software developed by Zuo et al, where the supercell is the input structure as shown in Fig. 3c, d. The beam energy is 60 kV. A series of defocus parameters are tried to obtain the correct images.
The DFT calculation
The DFT calculations are performed using the pseudopotential plane-wave method with projected augmented wave45 potentials and Perdew–Burke–Ernzerhof-type generalized gradient approximation46 for exchange-correlation functional, as implemented in the Vienna ab initio simulation package.47 The plane-wave energy cutoff is set to be 400 eV. The convergence threshold was 10−5 eV for energy and 0.03 eV/Å for force, respectively. The Brillouin zone is sampled by 4 × 4 × 1 k-point meshes within the Monkhorst–Pack scheme for geometry optimizations. On the basis of the equilibrium structures, 30 k-points are then used to compute the electronic structures.
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Acknowledgements
We gratefully acknowledge the financial support of the National Key Projects for Basic Research of China (Grant Nos: 2013CB922100, 2011CB922103), the National Natural Science Foundation of China (Grant Nos: 91421109, 11134005, 11522432, 11474147, 21373045, 21525311, 21571097 and 11274003), the PAPD project, the Natural Science Foundation of Jiangsu Province (Grant BK20130054, BK20130016, BK20160659), the New Century Excellent Talents in University (NCET), the Opening Project of Wuhan National High Magnetic Field Center, Huazhong University of Science and Technology (2016KF02) and the Fundamental Research Funds for the Central Universities. We would also like to acknowledge the helpful assistance of the Nanofabrication and Characterization Center at the Physics College of Nanjing University. J.W. thanks the computational resources at the SEU and National Supercomputing Center in Tianjin.
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Y.M., C.L., R.X. and P.W. contribute equally. F.S., X.W. and J.W. conceived of and coordinated the work. Y.M. prepared the samples and performed the transport measurements. C.L. and J.W. carried out the simulation. R.X. fabricated the devices. P.W. and S.G. performed the TEM measurements. Xf.W., H.B., B.W. and G.W. participated in the discussions. Y.S. prepared the molecules. F.S., Y.M., C.L., X.W. and J.W. wrote the paper. All the authors provided comments on the manuscript.
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Meng, Y., Ling, C., Xin, R. et al. Repairing atomic vacancies in single-layer MoSe2 field-effect transistor and its defect dynamics. npj Quant Mater 2, 16 (2017). https://doi.org/10.1038/s41535-017-0018-7
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DOI: https://doi.org/10.1038/s41535-017-0018-7
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