Interface structure and electrical properties of PtSi/Si_1−x Ge _x diodes based on silicon

Abstract

PtSi/strained Si_1−x Ge _x (x=0, 0.2, and 0.25) Schottky-barrier diodes (SBD) with extended cutoff wavelengths have been demonstrated by combining pulsed laser deposition (PLD) and molecular beam epitaxy (MBE). Pt was deposited by PLD on the Si_1−x Ge _x alloys with a thin Si sacrificial cap layer fabricated by MBE. By the reaction of deposited Pt film on Si, a sacrificial cap layer silicide SBD has been fabricated. Auger electron depth profiling was performed on the films before and after in vacuo annealing to study the redistribution of composition in the reactions. High-resolution transmission electron microscopy was used to investigate the interface structure. We have found that Pt reacts mainly with Si to form silicides at 350 °C, leaving some Ge to segregate at the surface. With annealing at 600 °C for 3 min the interface of PtSi/Si_1−x Ge _x is smooth. Since lowered-barrier-height silicide SBD are desirable for obtaining longer cutoff wavelength Si-based infrared detectors, the Schottky barrier heights of the PtSi/strained Si_1−x Ge _x SBDs with smooth interfaces were substantially lower than those of PtSi/Si SBDs, i.e., decreased with increasing Ge fraction, allowing for tuning of the SBDs cutoff wavelength. At 293 K, the ideality factor has been found to be 2.00 and 1.32 for PtSi/Si_0.80Ge_0.20 and PtSi/Si_0.75Ge_0.25 diodes, respectively. We have shown that high quantum efficiency and near-ideal dark current can be obtained in the film of PtSi/strained Si_1−x Ge _x with an excellent interface fabricated by MBE and PLD, after annealing at 600 °C for 3 min.