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Study of RF Linearity in sub-50 nm MOSFETs Using Simulations

Abstract

We investigate the linearity performance of dual-gate and fully-depleted silicon-on-insulator MOSFETs through use of 2D computer simulations, which take into account quantum mechanical considerations and non-equilibrium transport effects. We show that DG MOSFET is superior not only in terms of g m /I d characteristics, central to analog performance, but also in terms of linearity performance, by up to 5 dBm, in most operating conditions. Linearity figures of devices considered in this work range from −10 to −20 dBm, which answer the needs of mobile communication standards currently in use. We also observe that, when properly scaled, bulk MOSFETs display competitive analog performance and have third-order intercept figures very similar to SOI device. We can identify, through simulation experiments, that quantum mechanical effects have positive impact on linearity, while non-equilibrium conditions lower linearity performance. With increasing drain bias, we find that linearity saturates at a moderately low voltage (∼1 V) in all devices.

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Ma, W., Kaya, S. & Asenov, A. Study of RF Linearity in sub-50 nm MOSFETs Using Simulations. Journal of Computational Electronics 2, 347–352 (2003). https://doi.org/10.1023/B:JCEL.0000011450.37111.9d

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  • DOI: https://doi.org/10.1023/B:JCEL.0000011450.37111.9d

  • linearity
  • MOSFET
  • device simulations
  • inter-modulation
  • RF CMOS