Abstract
An integrated approach is proposed to the design of economically efficient and high-performance processor arrays with systolic organization of computations. The approach includes the construction of VLSI-oriented versions of locally recursive algorithms and synthesis of new architectures of processor arrays for transforming algorithms that maximally take into account fundamental restrictions of VLSI technology. Within the framework of this approach, strategies are developed for obtaining the above-mentioned algorithms and architectures.
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REFERENCES
S. Y. Kung, “On supercomputing with systolic/wavefront array processors,” Proc. IEEE, 72, No. 7, 133–154 (1984).
N. Einspruk (ed.), VLSI Electronics: Design of Microstructures [Russian translation], Mir, Moscow (1989).
L. D. Elfimova and Yu. V. Kapitonova, “A fast algorithm for matrix multiplication and its efficient realization on systolic arrays,” Kibern. Sist. Anal., No. 1, 135–150 (2001).
D. I. Moldovan, “On the design of algorithms for VLSI systolic arrays,” Proc. IEEE, 71, No. 1, 140–149 (1983).
S. V. Rayopadhye and R. M. Fujimoto, “Synthesizing systolic arrays from recurrence equations,” Parallel Computing, 14, 163–189 (1990).
P. Quinton, “Automatic synthesis of systolic arrays from uniform recurrent equations,” in: Proc. 11th Annual Symp. on Comput. Archit., IEEE Comput. Soc. Press, Ann Arbor, Mich. (1984), pp. 208–214.
V. V. Voyevodin and S. A. Krasnov, “Mathematical questions of designing systolic arrays,” Prepr. Otd. Vychisl. Mat., Akad. Nauk SSSR, No. 80, Moscow (1985).
Yu. S. Kanevski, Systolic Processors [in Russian], Tekhnika, Kiev (1991).
H. T. Kung and C. E. Leiserson, “Algorithms for VLSI processor arrays,” in: C. Mead and L. Convey (eds.), Introduction to VLSI Systems, Addison-Wesley, Reading, Mass. (1980), pp. 37–46.
S. Y. Kung, VLSI Array Processors [Russian translation], Mir, Moscow (1991).
D. A. Pospelov, An Introduction to the Theory of Computer Systems [in Russian], Sov. Radio, Moscow (1972).
V. V. Voyevodin, Mathematical Models and Methods in Parallel Processes [in Russian], Nauka, Moscow (1986).
R. Wyrzykovski, L. Elfimova, and Yu. Kanevski, “Systolic array implementation of some iterative algorithms for solving system of linear algebraic equations,” Kibern. Sist. Anal., No. 5, 145–158 (1992).
R. Wyrzykovski, L. Elfimova, and Yu. Kanevski, “A fast toroidal systolic array for matrix operations,” in: Proc. 6th Int. Workshop on Parallel Processing by Cellular Automata and Arrays, PARCELLA-94 (Potsdam, Germany), 81, Akad.-Verlag, Potsdam (1994), pp. 237–245.
D. I. Moldovan and J. A. B. Fortes, “Partitioning and mapping algorithms into fixed-sized systolic arrays,” IEEE Trans. Comp., C–35, No. 1, 1–12 (1986).
J. J. Navarro, J. M. Liaberia, and M. Valero, “Partitioning: An essential step in mapping algorithms into array processors,” Computer, 21, No. 7, 77–89 (1987).
H. Nelis, E. Deprettere, and J. Bu, “Automatic design and partitioning of VLSI systolic/wavefront arrays,” Proc. SPIE, 827, 15–24 (1987).
R. Wyrzykovski, “Foundations of the theory of design and structural-functional organization of customizable processor matrices (based on an example of problems of linear algebra),” Abstract of Doctoral Dissertation in Technical Sciences, NTU KPI, Kiev (1995).
Yu. V. Kapitonova and A. A. Letichevskii, Mathematical Theory of Computing System Design [in Russian], Nauka, Moscow (1988).
V. V. Voyevodin, “Theory and practice of investigating the parallelism of sequential programs,” Programming, No. 3, 38–54 (1992).
I. V. Ilovaiskii and B. A. Sidristyi, Foundations of the Theory of Designing Digital Machines and Systems [in Russian], Nauka, Novosibirsk (1976).
Yu. S. Kanevski and D. V. Korchev, “Mapping the index set of algorithm variables onto a systolic structure,” Kibernetika, No. 1, 51–57 (1991).
D. I. Moldovan, “On the analysis and synthesis of VLSI algorithms,” IEEE Trans. Comp., C-31, No. 11, 1121–1126 (1982).
W. L. Miranker and A. Winkler, “Space-time representations of systolic computational structures,” Computing, 32, 93–114 (1984).
B. Lisper, “Synthesizing synchronous systems by static scheduling in space-time,” Lect. Notes Comput. Sci., 362 (1989).
S. G. Sedukhin, “A systematic approach to the design of computational structures based on VLSI,” Prepr. VTs SO Akad. Nauk SSSR, No. 589, Novosibirsk (1985).
Yu. S. Kanevski and A. M. Sergienko, “Formalized design of systolic structures and their processor elements,” Avtomat. Vychisl. Techn., No. 3, 72–78 (1990).
L. Elfimova, “A new fast systolic array for a modified Winograd algorithm,” in: Proc. 6th Int. Workshop on Parallel Processing by Cellular Automata and Array, PARCELLA-96 (Berlin, Germany), 96, Akad.-Verlag, Berlin (1996), pp. 157–164.
V. A. Yemelichev, O. I. Mel'nikov, V. I. Sarvanov, and R. I. Tyshkevich, Lectures on Graph Theory [in Russian], Nauka, Moscow (1990).
A. L. Rosenberg, “Three-dimensional VLSI: A case study,” J. ACM., 30, No. 30, 397–416 (1983).
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Elfimova, L.D., Kapitonova, Y.V. An Integrated Approach to the Design of Processor Arrays with Systolic Organization of Computations. Cybernetics and Systems Analysis 38, 797–807 (2002). https://doi.org/10.1023/A:1022927518017
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DOI: https://doi.org/10.1023/A:1022927518017