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Mismatch Modeling and Simulation—A Comprehensive Approach

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Abstract

This article describes a comprehensive approach to mismatch simulation and modeling as needed for integrated circuit design. Local device mismatch as well as global process variations and parameter correlations are regarded. A method for mismatch modeling based on spatial frequencies is described, which enables to overcome insufficiencies of the first order models. Measurement results are presented to demonstrate the achieved modeling precision. All models and methods mentioned here are commercially available in the simulation tool GAME (General Analysis of Mismatch Effects) which is used in the semiconductor industry since 1998.

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References

  1. Lakshmikumar, K. R., Hadaway, R. A. and Copeland, M. A., “Characterization and modeling of mismatch in MOS transistors for precision analog design.” IEEE Journal of Solid State Circuits 21(12), pp. 1057-1066, December 1986.

    Google Scholar 

  2. Pelgrom, M. J. M., Duinmaijer, A. C. J. and Welbers, A. P. G., “Matching properties of MOS transistors.” IEEE Journal of Solid State Circuits 24(5), pp. 1433-1439, 1989.

    Google Scholar 

  3. Tarim, T. B. and Ismail, M., “Enhanced analog 'Yields' cost-effective systems-on-chip.” IEEE Circuits and Devices, Computer Aided Methods for Yield Enhancement of Analog Circuits 36(2), pp. 12-22, March 1999.

    Google Scholar 

  4. Oehm, J., Grünebaum, U. and Schumacher, K., “Mismatch effects explained by the spectral model,” in Proceedings of IEEE International Conference on Electronic Circuits and Systems (ICECS '99), Paphos, Cyprus, September 1999.

  5. ZKOM GmbH. GAME 3.7 User's Manual. ZKOM GmbH, Dortmund, Germany, www.zkom.de, 1998.

    Google Scholar 

  6. Brass, E., “Untersuchung der lokalen und globalen Herstellgenauigkeit integrierter Halbleiterbauelemente.” Ph.D. Thesis, AG Mikroelektronik, Universität Dortmund, May 1997.

  7. Grünebaum, U., Oehm, J. and Schumacher, K., “Mismatch modelling for large area MOS devices,” in Proceedings of IEEE European Solid State Circuits Conference (ESSCIRC '97), Southhampton, England, April 1997.

  8. Lovett, S. J., Welten, M., Mathewson, A. and Barry Mason, “Optimizing MOS transistor mismatch.” IEEE Journal of Solid State Circuits 33(1), pp. 147-150, January 1998.

    Google Scholar 

  9. Yang, E. S. Microelectronic Devices. McGraw-Hill, Inc., ISBN 0-07-072238-2, 1988.

  10. Oehm, J., Grünebaum, U. and Schumacher, K., “Overcoming insufficiencies of first order mismatch modelling,” in Proceedings of IEEE European Solid State Circuits Conference (ESSCIRC '98), Delft, The Netherlands, September 1998.

  11. Oehm, J., “Statistische Gesetzmäßigkeiten in der monolithischen Systemintegration.” Postdoctoral Thesis, Universität Dortmund, AG Mikroelektronik, 1999 (to be published).

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Grünebaum, U., Oehm, J. & Schumacher, K. Mismatch Modeling and Simulation—A Comprehensive Approach. Analog Integrated Circuits and Signal Processing 29, 165–171 (2001). https://doi.org/10.1023/A:1011209313352

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  • DOI: https://doi.org/10.1023/A:1011209313352

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