R.W. Butler and J.A. Sjogren, “A PVS graph theory library,” Technical Report Memorandum, NASA Langly Research Center. http://atb-www.larc.nasa.gov/ftp/larc/PVS-library, 1997.
E.M. Clarke, O. Grumberg, H. Haraishi, S. Jha, D. Long, K.L. McMillan, and L. Ness, “Verification of the futurebus+ cache coherence protocol,” Technical Report CMU-CS-92-206, School of Computer Science, Carnegie Mellon University, 1992.
F. Corella, “Proposal to fix ordering problem in PCI 2.1,” http://www.pcisig.com/reflector/thrd8.htm1#00706. 1996.
F. Corella, “Verifying memory ordering model of I/O system,” in '97, Toledo, Spain, 1997. Invited Talk.
F. Corella, R. Shaw, and C. Zhang, “A formal proof of absence of dead-lock for any acyclic network of PCI buses,” in '97. Toledo, Spain, 1997.
R. Ghughal, A. Mokkedem, R. Nalumasu, and G. Gopalakrishnan, “Using ‘test model-checking’ to verify the runway-PA8000 memory model,” in Tenth ACM Symposium on Parallel Algorithms and Architectures. Puerto Vallarta, Mexico, 1998, pp. 231–239.
G. Gopalakrishnan, R. Ghughal, R. Hosabettu, A. Mokkedem, and R. Nalumasu, “Formal modeling and validation applied to a commercial coherent bus: A case study,” in H.F. Li and D.K. Probst (Eds.), '97. Montreal, Canada, 1997, pp. 48–62.
G. Holzmann, Design and Validation of Computer Protocols. Prentice Hall, 1991.
A. Mokkedem, R.M. Hosabettu, M.D. Jones, and G. Gopalakrishnan, “Formalization and analysis of a solution to the PCI 2.1 bus transaction ordering problem: PVS files,” Technical Report UUCS-99-007, 1999.
V. Nagasamy, S. Rajan, and P.R. Panda, “Fiber channel protocol: Formal specification and verification,” in Sixth Annual Silicon Valley Networking Conference, 1997.
R. Nalumasu, R. Ghughal, A. Mokkedem, and G. Gopalakrishnan, “The ‘test model-checking’ approach to the verification of formal memory models of multiprocessors,” in Lecture Notes in Computer Science, Vol. 1427 of Lecture Notes in Computer Science. Vancouver, BC, Canada, 1998, pp. 464–476.
S. Owre, J. Rushby, N. Shankar, and F. von Henke, “Formal verification for fault-tolerant architectures: Prolegomena to the design of PVS,” IEEE Transactions on Software Engineering Vol. 21, No. 2, pp. 107–125, 1995.
S. Park and D.L. Dill, “Protocol verification by aggregation of distributed action,” in R. Alur and T.A. Henzinger (Eds.), '96, Vol. 1102 of Lecture Notes in Compuer Science. New Brunswick, NJ, 1996, pp. 300–310.
PCISIG, ‘PCI Special Interest Group–PCI Local Bus Specification, Revision 2.1', 1995.
E. Solari and G. Willse, PCI Hardware and Software Architecture & Design. Annabooks, 3rd edition, ISBN 0-929392-32-9, 1996.
VSI Alliance, “Interface standards for design re-use of virtual components,” http://www.vsi.org/.