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A Comparison Design of Comb Decimators for Sigma-Delta Analog-to-Digital Converters

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Abstract

This paper presents a comparison design of comb decimators based on the non-recursive algorithm and the recursive algorithm. Compared with the recursive algorithm, the main advantage of the non-recursive algorithm is its abilities of reducing power consumption and increasing circuit speed especially when the decimation ratio and filter order are high. Based on the non-recursive algorithm, a decimator with programmable filter orders (3rd, 4th and 5th), decimation ratios (8, 16, 32 and 64) and input bits (1 and 2 bits) has been implemented in a 0.6 μm 3.3 V CMOS process. Its measured core power consumption is 44 mW at the oversampling rate of 25 MHz and its highest input data rate is 110 MHz.

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Gao, Y., Jia, L., Isoaho, J. et al. A Comparison Design of Comb Decimators for Sigma-Delta Analog-to-Digital Converters. Analog Integrated Circuits and Signal Processing 22, 51–60 (2000). https://doi.org/10.1023/A:1008372010560

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  • DOI: https://doi.org/10.1023/A:1008372010560

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