Abstract
A simple technique for detecting adjustable contrast in a visual scene is presented. The circuit elements can be used to detect contrast in any array of sensors or processing elements where spatial relationships among neighboring elements define contrast or the presence of an edge. This technique eliminates the need for a differential pair, thereby allowing more than two inputs to be compared for contrast in a single processing step. The circuit elements first smooth erroneous edges in the array through the use of a resistive network, then, the mean (scaled by an adjustable amount) of a pixel and its neighbors is compared to the harmonic mean of the same pixels to detect the presence of contrast within the pixel neighborhood. Comparison between the mean and harmonic mean allows the detection of contrast to be scale-invariant as long as the transistors remain in subthreshold operation. This circuit offers the massively parallel processing inherent to focal plane processing within an 18% fill factor in a 2 μm process, 6.8 μW typical power dissipation per element, and 0.67 ms response time at low power subthreshold operation. Results for a proof of concept, 8×8 array of pixels with light inputs, as well as a purely electronic input, 4×4 array are presented.
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References
J. C RussImage Processing Handbook. CRC Press, Boca Raton, FL, Chapters 3, 4, 5, 6.
J. G. Harris, “Continuous time segmentation networks.” Visual Information Processing from Neurons to Chips, SPIE, 1473, pp. 161-171, 1991.
W. Bair and C. Koch, “An analog VLSI chip for Ænding edges from zero crossings.” Neural Information Processing Systems 3, pp. 399-405, 1991.
J. G. Harris, C. Koch, and J. Luo, “A two-dimensional analog VLSI circuit for detecting discontinuities in early vision.” Science248, pp. 1209-1211, 1990.
M. D. Rowley and J. G. Harris, “A comparison of three onedimensional edge detection architectures for analog VLSI vision systems.” IEEE International Symposium on Circuits and Systems, Hong Kong, 9-12, 1997, pp. 1840-1843.
T. Ando, K. Yamamoto, and K. Sawada, “Contrast edge detection using differential input technique of a CCD.” Electronics Letters 28(3), 2190-2191, 1992.
J. G. Harris, C. Koch, and J. Luo, “Resistive fuses analog hardware for detecting discontinuities in early vision.” In Analog VLSI Implementation of Neural Systems, pp. 27-55 Kluwer, London, 1989.
C. Mead, Analog VLSI and Neural Systems. Addison-Wesley Reading, MA, Chapter 3, 1989.
W. Bair, and C. Koch, “Real-time motion detection using an analog VLSI zero-crossing chip.” Proceedings of the SPIE 1473, pp. 59-65, 1991.
M. Rowley and J. Harris, “An edge enhancement technique for analog VLSI early vision applications.” IEEE International Conference on Neural Networks Washington DC, pp. 1000-1004, 1996.
T. Delbruck and C. A. Mead, “Photoreceptor circuit with wide dynamic range.” International Circuits and Systems Conference. London, England, 1994.
Andreou, A. G., K. Strohbehn, and R. E. Jenkins, “Silicon retina for motion computation.” Proc IEEE Intl Symp Circuits and Systems, Singapore, pp. 1373-1376, 1991.
T. Delbruck, “Silicon retina with correlation-based velocitytuned pixels.” IEEE Trans on Neural Networks 4(3), 529-541, 1993.
J. Kramer, R. Sarpeshkar, and C. Koch, “Analog VLSI motion discontinuity detectors for image segmentation.” IEEE Symposium on Circuits and Systems, Atlanta, GA, pp. 620-623, 1996.
R. Etienne-Cummings, J. Van der Spiegel, and P. Mueller, “A focal plane visual motion measurement sensor.” IEEE Trans on Circuits and Systems. I, Fundamental theory and applications 44(1), pp. 55, 1997.
C. Koch, A. Moore, W. Bair, T. Horiuchi, B. Bishofberger, and J. Lazarro, “Computing motion using analog VLSI vision chips. An experimental comparison among four approaches.” Proc IEEE Workshop on Visual Motion, pp. 312-324, 1991.
J. Tanner, and C. Mead, “An integrated optical motion sensor.” VLSI Signal Processing II IEEE Press, New York, pp. 59-76, 1986.
A. Momi, A. Bouzerdoum, K. Eshraghian, A. Yakovleff, X. T. Nguyen, A. Blanksby, R. Beare, D. Abbott, and R. E. Bogner, “An insect vision-based motion chip.” IEEE J Solid State Circuits 32(2), pp. 279-284, 1997.
R. Sarpeshkar, W. Bair, and C. Koch, “Visual motion computation in analog VLSI using pulses.” Advances in Neural Information Processing Systems 5, pp. 781-788, 1993.
D. Standley, “An object position and orientation. IC with embedded imager.” IEEE Journal of Solid State Circuits 26(12), 1991.
S. DeWeerth, “Analog VLSI circuits for stimulus localization and centroid computation.” International Journal of Computer Vision 8, pp. 191-202, 1992.
T. G. Morris, D. M. Wilson, and S. P. DeWeerth, “Analog VLSI circuits for manufacturing inspection.” 1995 Advanced Research in VLSI IEEE Computer Society Press, Los Alamitos, California, pp. 241-255, 1995.
T. G. Morris and S. P. DeWeerth, “Analog VLSI arrays for morphological image processing.” ASAP San Francisco, California, pp. 32-142, 1994.
T. Delbruck, “Bump circuits for computing similarity and dissimilarity of analog voltages.”, Proceedings of International Joint Conference on Neural Networks Seattle, WA, July 8-12,pp. I-475-I-479, 1991.
B. C. Harris and S. P. DeWeerth, “Analog encoding circuits for digital CMOS neural oscillator.” ISCAS `95, SeattleWashington, 1995.
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Wilson, D.M. An Analog VLSI, Scale Invariant Method for Edge Detection. Analog Integrated Circuits and Signal Processing 23, 211–226 (2000). https://doi.org/10.1023/A:1008323730917
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DOI: https://doi.org/10.1023/A:1008323730917