Abstract
A new emulated digital CNN Universal Machine chip architecture is introduced and the main steps of the design process are shown in this paper. One core processor can be implemented on 2 × 2 mm2 silicon area with a 0.35 μm CMOS technology. Assuming an array of 24 processors on a chip, its speed is 1ns/virtual cell/CNN iteration with 12 bit precision. This enables the execution of over five hundred 3 × 3 convolution operations on each frame of a 240 × 320-pixel 25 fps digital image flow. Another new feature of the design is its variable precision capability. This allows the user to trade off precision for speed. The architecture supports some non-linear filter implementation as well.
Similar content being viewed by others
References
T. Roska and L.O. Chua, “The CNN Universal Machine: An analogic array computer,” IEEE Transactions on Circuits and Systems-II, Vol. 40, pp. 163–173, March 1993.
L.O. Chua and L. Yang, “Cellular neural networks: Theory and Applications,” IEEE Trans. on Circuits and Systems, Vol. 35, pp. 1257–1290, 1988.
A. Rodrigez-Vazquez, R. Dominguez-Castro, and S. Espejo, “Challenges in Mixed-Signal IC Design ofCNNChips in Submicron CMOS,” Proc. of the fifth IEEE Int. Workshop on Cellular Neural Networks and their Applications, London, p. 13, April 1998.
S. Espejo, R. Dominguez-Castro, G. Linan, and A. Rodriguez-Vazquez, “A64 ¤ 64 CNN Universal Chip with analog and digital I/O,” Proc. of the IEEE International Conference on Electronics, Circuits and Systems (ICECS98), Lisboa, pp. 203–206, 1998.
A. Paasio, A. Dawindzuk, K. Halonen, and V. Porra, “Minimum Size 0.5 Micron CMOS Programmable 48 × 48 CNN Test Chip,” European Conference on Circuit Theory and Design, Budapest, pp. 154–15, 1997.
http://www.intel.com/pressroom/archive/releases/CN0611B. HTM
S. Andersson, “Recent Progress on Logic and Algorithms for Optical Neural Networks (ONN),” Proc. of the fifth IEEE Int. Workshop on Cellular Neural Networks and their Applications, London, p. 50, April 1998.
K.A. Wen, J.Y. Su, and C.Y. Lu, “VLSI design of digital Cellular Neural Networks for image processing,” J. of Visual Communication aand Image Representation, Vol. 5, No. 2, pp. 1117–126, 1994.
T. Ikenaga and T. Ogura, “Discrete-time Cellular Neural Networks using highly-parallel 2D Cellular Automata CAM2,” Proc. of Int. Symp. on Nonlinear Theory and its Applications, pp. 221–224, 1996.
M.D. Doan, M. Glesner, R. Chakrabaty, M. Heidenreich, and S. Cheung, “Realisation of digital Cellular Neural Network for image processing,” Proc. of the IEEE CNNA'94, Rome, pp. 85- 90, 1994.
CNAPS/PCI Parallel Co-processor, Adaptive Solutions Inc.
A. Zarándy, P.Keresztes, T. Roska, and P. Szolgay, “An emulated digital architecture implementing the CNN Universal Machine,” Proc. of the fifth IEEE Int. Workshop on Cellular Neural Networks and their Applications, London, pp. 249–252, April 1998.
I. Szatmáari, K. László, Cs. Rekeczky, and T. Roska, “SIMCNN: Multi-Layer CNN Simulator for The Visual Mouse Platform; User's Guide,” Comp. Aut. Inst. of The Hung. Acad. of Sci., Budapest, Hungary, 1997.
R. Dominguez-Castro, S. Espejo, A. Rodriguez-Vazquez, and R. Carmona, “A CNN Universal Chip in CMOS Technology,” Proc. of the third IEEE Int. Workshop on Cellular Neural Networks and their Application(CNNA-94), Rome, pp. 91–96, Dec. 1994.
C.R. Baugh and B.A. Wooley, “A Twos Complement Parallel Array Multiplication Algorithm,” IEEE Trans. Comp, Vol. C-22, No. 12, pp. 1045–1047, Dec. 1973.
Livermore MAGIC Release User's manual, PaloAlto, 1990.
CADENCE User's manual, 1999.
Author information
Authors and Affiliations
Rights and permissions
About this article
Cite this article
Keresztes, P., Zarándy, Á., Roska, T. et al. An Emulated Digital CNN Implementation. The Journal of VLSI Signal Processing-Systems for Signal, Image, and Video Technology 23, 291–303 (1999). https://doi.org/10.1023/A:1008141017714
Published:
Issue Date:
DOI: https://doi.org/10.1023/A:1008141017714