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A FPGA-based Library for On-Line Signal Processing

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Abstract

A library of on-line arithmetic structures is presented. Their ability to produce and consume the most significant digit first allows subsequent computations to begin earlier, shortens the execution time of variable precision and composite operations, and simplifies interconnection networks which can help preserve high clock rates in large digit-serial designs. More importantly, designers can interconnect individual units without designing intermediate structures to reformat data, a luxury that is currently unavailable to FPGA designers wishing to use bit-serial arithmetic. The on-line structures introduced are small, and can be easily combined to yield more powerful blocks. The library's applicability to signal processing applications is demonstrated with the DFT, DCT, and FIR filter. Results indicate high area efficiency and rapid execution speed.

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Author information

Authors and Affiliations

  1. UCLA, University of California, Los Angeles, 56-125B, Engr. IV Bldg., Los Angeles, CA, 90095-1594

    Dannie Lau & John Villasenor

  2. Department of Computer Science, UCLA, University of California, Los Angeles, 56-125B, Engr. IV Bldg., Los Angeles, CA, 90095-1594

    Aaron Schneider & Milos D. Ercegovac

Authors
  1. Dannie Lau
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  2. Aaron Schneider
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  3. Milos D. Ercegovac
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  4. John Villasenor
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Lau, D., Schneider, A., Ercegovac, M.D. et al. A FPGA-based Library for On-Line Signal Processing. The Journal of VLSI Signal Processing-Systems for Signal, Image, and Video Technology 28, 129–143 (2001). https://doi.org/10.1023/A:1008119407508

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