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High-Level Cache Modeling for 2-D Discrete Wavelet Transform Implementations

  • Y. Andreopoulos
  • P. Schelkens
  • G. Lafruit
  • K. Masselos
  • J. Cornelis
Article

Abstract

The main implementations of the 2-D binary-tree discrete wavelet decomposition are theoretically analyzed and compared with respect to data-cache performance on instruction-set processor-based realizations. These implementations include various image-scanning techniques, from the classical row-column approach to the block-based and line-based methods, which are proposed in the framework of multimedia-coding standards. Analytical parameterized equations for the prediction of data-cache misses under general realistic assumptions are proposed. The accuracy and the consistency of the theory are verified through simulations on test platforms and a comparison is made with the results from a real platform.

cache memories discrete wavelet transform implementations theoretical modeling 

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Copyright information

© Kluwer Academic Publishers 2003

Authors and Affiliations

  • Y. Andreopoulos
    • 1
  • P. Schelkens
    • 1
  • G. Lafruit
    • 2
  • K. Masselos
    • 3
  • J. Cornelis
    • 1
  1. 1.Dept. ETROVrije Universiteit Brussel/IMECBrusselsBelgium
  2. 2.Inter-University Micro-Electronics Center—IMECLeuvenBelgium
  3. 3.Development Programs DepartmentIntracom S.A.AthensGreece

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