A Parallel VLSI Video/Communication Controller

  • Gr. Doumenis
  • G. Konstantoulakis
  • G. Korinthios
  • G. Lykakis
  • D. Reisis
  • G. Synnefakis
Article

Abstract

This paper presents a VLSI architecture specifically designed as a video/communication controller to support emerging applications in the area of video/data communications. The controller is a parallel architecture consisting of three (3) processing modules, a shared memory with four (4) banks and two (2) input/output modules and operating at the transfer speed of 622 Mbits/sec. The processing modules and memory banks communicate through a low cost interconnection scheme able though to perform at system's required data transfer rate. The entire system constitutes a component which can accommodate a switching system as an intelligent buffer with real time processing and multiplexing capabilities. The component performs operations on fixed and/or variable length packets of data on a stream basis. The architecture embeds both the processing and the memory modules, thus producing a “system on a chip” solution.

video communication traffic shaping packet networks parallel architectures shared memory interconnection networks 

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Copyright information

© Kluwer Academic Publishers 2001

Authors and Affiliations

  • Gr. Doumenis
    • 1
  • G. Konstantoulakis
    • 1
  • G. Korinthios
    • 2
  • G. Lykakis
    • 1
  • D. Reisis
    • 2
  • G. Synnefakis
    • 1
  1. 1.Telecommunications Lab., Computer Science DivisionNational Technical University of Athens (NTUA)AthensGreece
  2. 2.Electronics Lab., Applied Physics DivisionUniversity of Athens (UoA)Greece

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