International Journal of Parallel Programming

, Volume 29, Issue 3, pp 217–247

Improving Memory Hierarchy Performance for Irregular Applications Using Data and Computation Reorderings


DOI: 10.1023/A:1011119519789

Cite this article as:
Mellor-Crummey, J., Whalley, D. & Kennedy, K. International Journal of Parallel Programming (2001) 29: 217. doi:10.1023/A:1011119519789


The performance of irregular applications on modern computer systems is hurt by the wide gap between CPU and memory speeds because these applications typically under-utilize multi-level memory hierarchies, which help hide this gap. This paper investigates using data and computation reorderings to improve memory hierarchy utilization for irregular applications. We evaluate the impact of reordering on data reuse at different levels in the memory hierarchy. We focus on coordinated data and computation reordering based on space-filling curves and we introduce a new architecture-independent multi-level blocking strategy for irregular applications. For two particle codes we studied, the most effective reorderings reduced overall execution time by a factor of two and four, respectively. Preliminary experience with a scatter benchmark derived from a large unstructured mesh application showed that careful data and computation ordering reduced primary cache misses by a factor of two compared to a random ordering.

memory hierarchy optimization data reordering computation reordering space-filling curves multi-level blocking 

Copyright information

© Plenum Publishing Corporation 2001

Authors and Affiliations

  • John Mellor-Crummey
    • 1
  • David Whalley
    • 2
  • Ken Kennedy
    • 1
  1. 1.Department of Computer Science, MS 132Rice UniversityHouston
  2. 2.Computer Science DepartmentFlorida State UniversityTallahassee

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