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Principles in the Evolutionary Design of Digital Circuits—Part I

  • Julian F. Miller
  • Dominic Job
  • Vesselin K. Vassilev
Article

Abstract

An evolutionary algorithm is used as an engine for discovering new designs of digital circuits, particularly arithmetic functions. These designs are often radically different from those produced by top-down, human, rule-based approaches. It is argued that by studying evolved designs of gradually increasing scale, one might be able to discern new, efficient, and generalizable principles of design. The ripple-carry adder principle is one such principle that can be inferred from evolved designs for one and two-bit adders. Novel evolved designs for three-bit binary multipliers are given that are 20% more efficient (in terms of number of two-input gates used) than the most efficient known conventional design.

evolutionary computing evolvable hardware cicuit design 

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References

  1. S. B. Akers, “Binary decision diagrams,” IEEE Transactions on Computers vol. C-27 pp. 509-516, 1978.Google Scholar
  2. J. W. Atmar, “Speculation on the Evolution of Intelligence and its Possible Realization in Machine Form,” New Mexico State University, Las Cruces, NM, PhD thesis, 1976.Google Scholar
  3. Th. Bäck, Evolutionary Algorithms in Theory and Practice: Evolutionary Strategies, Evolutionary Programming, Genetic Algorithms, Oxford University Press: New York, NY, 1996.Google Scholar
  4. T. Bäck, F. Hoffmeister, and H.-P. Schwefel, “A survey of evolutionary strategies,” in Proceedings of the 4th International Conference on Genetic Algorithms, R. Belew and L. Booker (eds.) Morgan Kaufmann, San Francisco, CA, 1991, pp. 2-9.Google Scholar
  5. W. Banzhaf, P. Nordin, R. E. Keller, and F. D. Francone, Genetic Programming: An Introduction, Morgan Kaufmann: San Francisco, CA, 1998.Google Scholar
  6. F. H. Bennett, III, J. R. Koza, M. Keane, and D. Andre, “Genetic programming: Biologically inspired computation that exhibits creativity in solving non-trivial problems,” in Proceedings of AISB'99 Symposium on Artificial Intelligence and Scientific Creativity, 1999, pp. 29-38.Google Scholar
  7. T. Blickle, “Theory of Evolutionary Algorithms and Application to System Synthesis,” Eidgenossiche Technische Hochschule, Zurich, PhD thesis, 1997.Google Scholar
  8. G. Box and G. Jenkins, Time Series Analysis, Forecasting and Control, Holden Day, 1970.Google Scholar
  9. K. S. Brace, R. L. Rudell, and R. E. Bryant, “Efficient implementation of a BDD package,” in Proceedings of 27th ACMrIEEE Design Automation Conference, 1990, pp. 40-45.Google Scholar
  10. R. K. Brayton, G. D. Hachtel, C. T. McMullen, and A. L. Sangiovanni-Vincentelli, Logic Minimization Algorithms for VLSI Synthesis, Kluwer Academic Publishers: MA, 1984.Google Scholar
  11. R. Brayton, R. Rudell, A. Sangiovanni-Vincentelli, and A. Wang, “MIS: A multiple-level optimization system,” IEEE Transactions on Computer-Aided Design of Integrated Circuits vol. CAD-6 pp. 1062-1081, 1987.Google Scholar
  12. R. Brayton, G. D. Hachtel, and A. L. Sangiovanni-Vincentelli, “Multilevel logic synthesis,” Proceedings of the IEEE vol. 78 pp. 264-300, 1990.Google Scholar
  13. R. Bryant, “Graph-based algorithms for Boolean function manipulation,” IEEE Transactions on Computers vol. C-35 pp. 677-691, 1986.Google Scholar
  14. R. Bryant, “On the complexity of VLSI implementations and graph representations of Boolean functions with application to integer multiplication,” IEEE Transactions on Computers vol. 40 pp. 205-213, 1991.Google Scholar
  15. X. Chen and S. L. Hurst, “A comparison of universal-logic-module realizations and their application in the synthesis of combinatorial and sequential logic networks,” IEEE Transactions on Computers vol. C-31 pp. 140-147, 1982.Google Scholar
  16. E. Coen, The Art of Genes. How Organisms Make Themselves, Oxford University Press: Oxford, UK, 1999.Google Scholar
  17. S. Devadas, “Comparing two-level and ordered binary decision diagram representations of logic functions,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems vol. 12 pp. 722-723, 1993.Google Scholar
  18. S. Devadas, A. Ghosh, and K. Keutzer, Logic Synthesis, McGraw-Hill Inc.: New York, 1994.Google Scholar
  19. R. Drechsler and M. Theobald, and B. Becker, “Fast OFDD based minimization of fixed polarity Reed-Muller expressions,” in Proceedings of the European Design Automation Conference, 1994, pp. 2-7.Google Scholar
  20. R. Drechsler, A. Sarabi, M. Theobald, B. Becker, and M. A. Perkowski, “Efficient representation and manipulation of switching functions based on ordered kronecker functional decision diagrams,” in Proceedings of the Design Automation Conference, 1994, pp. 415-419.Google Scholar
  21. R. Drechsler, N. Göckel, and B. Becker, “Learning heuristics for OBDD minimization by evolutionary älgorithms,” in Parallel Problem Solving from Nature IV, Lecture Notes in Computer Science, Springer, Heidelberg, 1996, vol. 1141, pp. 730-739.Google Scholar
  22. S. J. Flockton and K. Sheehan, “Intrinsic circuit evolution using programmable analogue arrays,” in Proceedings of the 2nd International Conference on Evolvable Systems: From Biology to Hardware, Lecture Notes in Computer Science, M. Sipper, D. Mange, and A. Pérez-Uribe (eds.), Springer-Verlag, Heidelberg, 1998, vol. 1478, pp. 144-153.Google Scholar
  23. S. Flockton and K. Sheehan, “A system for intrinsic evolution of linear and non-linear filters,” A. Stoica and D. Keymeulen and J. Lohn eds. in Proceedings of the 1st NasarDoD Workshop on Evolvable Hardware, IEEE Computer Society, Los Alamitos, CA, 1999, pp. 93-100.Google Scholar
  24. S. J. Friedman and K. J. Supowit, “Finding the optimal variable ordering for binary decision diagrams,” IEEE Transactions on Computers vol. C-39 pp. 710-713, 1990.Google Scholar
  25. M. Fujita and Y. Matsunaga, “Variable ordering of binary decision diagrams for multilevel logic minimization,” Fujitsu Scientific and Technical Journal vol. 29 pp. 137-145, 1993.Google Scholar
  26. C. Giraud-Carrier, “FLARE: Induction with prior knowledge,” in Proceedings of Expert Systems 1996, Research and Development in Expert Systems, SGES Publications, 1996, vol. XIII, pp. 173-181.Google Scholar
  27. D. Goldberg, Genetic Algorithms in Search, Optimization and Machine Learning, Addison-Wesley: Reading, MA, 1989.Google Scholar
  28. D. Green, Modern Logic Design, Addison-Wesley: Reading, MA, 1986.Google Scholar
  29. J. B. Grimbleby, “Automatic analogue network synthesis using genetic algorithms,” in Proceedings of the 1st International Conference on Genetic Algorithms in Engineering Systems: Innovations and Applications (GALESIA), IEE, London, 1995, pp. 53-58.Google Scholar
  30. D. L. Grundy, “A computational approach to VLSI analog design,” Journal of VLSI Signal Processing. vol. 8 (1) pp. 53-60, 1994.Google Scholar
  31. K. Hanney, “Learning Adaptation Rules From Cases,” Department of Computer Science, Trinity College, University of Dublin, Ireland, MSc thesis, 1996.Google Scholar
  32. T. Higuchi, T. Niwa, T. Tanaka, H. Iba, H. de Garis, and T. Furuya, “Evolvable Hardware—Genetic-Based Generation of Electric Circuitry at Gate and Hardware Description Language HDL Levels,” Electrotechnical Laboratory, Tsukuba, Japan, no. 93-4, 1993.Google Scholar
  33. T. Higuchi, T. Niwa, T. Tanaka, H. Iba, H. de Garis, and T. Furuya, “Evolving hardware with genetic learning: A first step towards building a darwin machine,” From Animals to Animats II: Proceedings of the 2nd International Conference on Simulation of Adaptive Behaviour, J.-A. Meyer and H. L. Roitblat and W. Stewart (ed.), MIT Press, Cambridge, MA, 1993, pp. 417-424.Google Scholar
  34. T. Higuchi and M. Iwata eds. in Proceedings of the 1st International Conference on Evolvable Systems: From Biology to Hardware, Lecture Notes in Computer Science, Springer-Verlag, Berlin, vol. 1259, 1996.Google Scholar
  35. J. Holland, Adaptation in Natural and Artificial Systems, MIT Press: Cambridge, MA, second edition, 1992.Google Scholar
  36. W. Hordijk, “A measure of landscapes,” Evolutionary Computation vol. 4(4) pp. 335-360, 1996.Google Scholar
  37. W. Hordijk, “Correlation analysis of the synchronising-CA landscape,” Physica D vol. 107 pp. 255-264, 1997.Google Scholar
  38. W. Hordijk and P. F. Stadler, “Amplitude spectra of fitness landscapes,” J. Complex Systems vol. 1 pp. 39-66, 1998.Google Scholar
  39. J. Hunt, “Evolutionary case base design,” Progress in Case-Based Reasoning First UK Workshop, Springer-Verlag: Berlin, 1995.Google Scholar
  40. H. Iba, M. Iwata, and T. Higuchi, “Machine learning approach to gate-level evolvable hardware,” in Proceedings of the 1st International Conference on Evolvable Systems: From Biology to Hardware, Lecture Notes in Computer Science, T. Higuchi and M. Iwata (eds.), Springer-Verlag, Heidelberg, 1997, vol. 1259, pp. 327-343.Google Scholar
  41. J. Jain, M. Abadir, J. Bitner, D. S. Fussell, and J. A. Abraham, “IBDDs: An efficient functional representation for digital circuits,” in Proceedings of the European Conference on Design Automation, 1992, pp. 440-446.Google Scholar
  42. D. Job, V. Shankararaman, and J. Miller, “Hybrid AI techniques for software design,” in Proceedings of 1999 Conference on Software Engineering & Knowledge Engineering, 1999, pp. 315-319.Google Scholar
  43. T. Jones, “Evolutionary Algorithms, Fitness Landscapes and Search,” University of New Mexico, Albuquergue, NM, PhD thesis, 1995.Google Scholar
  44. I. Kajitani, T. Hushino, D. Nishikawa, H. Yokoi, S. Nakaya, T. Yamauchi, T. Inuo, N. Kajihara, M. Iwata, D. Keymeulen, and T. Higuchi, “A gate-level EHW chip: Implementing GA operations and reconfigurable hardware on a single LSI,” in Proceedings of the 2nd International Conference on Evolvable Systems: From Biology to Hardware, Lecture Notes in Computer Science, M. Sipper and D. Mange and A. Perez-Uribe (eds.), Springer-Verlag, Heidelberg, 1998, vol. 1478, pp. 1-12.Google Scholar
  45. S. Kauffman, “Adaptation on Rugged Fitness Landscapes,” Lectures in the Sciences of Complexity, SFI Studies in the Sciences of Complexity, D. Stein (ed.), Addison-Wesley, Reading, MA, 1989, pp. 527-618.Google Scholar
  46. H. Kitano ed. in Massively Parallel Artificial Intelligence, MIT Press, Cambridge, MA, 1994.Google Scholar
  47. J. Kolodner, Case-Based Reasoning, Morgan Kaufmann: San Mateo, CA, 1993.Google Scholar
  48. J. R. Koza, Genetic Programming: On the Programming of Computers by Means of Natural Selection, MIT Press: Cambridge, MA, 1992.Google Scholar
  49. J. R. Koza, Genetic Programming II: Automatic Discovery of Reusable Programs, MIT Press: Cambridge, MA, 1994.Google Scholar
  50. J. R. Koza, D. Andre, and F. H. Bennett, III, “Use of automatically defined functions and architecturealtering operations in automated circuit synthesis with genetic programming,” in Proceedings of the 1st Annual Genetic Programming Conference, J. R. Koza et al. (eds.), MIT Press, Cambridge, MA, 1996, pp. 132-140.Google Scholar
  51. J. R. Koza, F. H. Bennett, III, D. Andre, and M. A. Keane, “Automated Design of Both the Topology and Sizing of Analog Electrical Circuits Using Genetic Programming,” Artificial Intelligence in Design, J. S. Gero and F. Sudweeks (eds.) Kluwer Academic Publishers, MA, 1996, pp. 151-170.Google Scholar
  52. J. R. Koza, F. H. Bennett, III, D. Andre, and M. A. Keane, Genetic Programming III: Darwinian Invention and Problem Solving, Morgan Kaufmann: San Francisco, CA, 1999.Google Scholar
  53. M. W. Kruiskamp and D. Leenaerts, “DARWIN: CMOS Opamp synthesis by means of genetic algorithms,” in Proceedings of the 32nd Design Automation Conference, Association for Computing Machinery, New York, 1995, pp. 433-438.Google Scholar
  54. W. Kunz and P. Menon, “Multi-level logic optimization by implication analysis,” in Proceedings of the International Conference on Computer-Aided Design ICCAD 1994, pp. 6-13.Google Scholar
  55. P. K. Lala, Practical Digital Logic Design and Testing, Prentice Hall: NJ, 1996.Google Scholar
  56. C. Y. Lee, “Representations of switching circuits by binary decision programs,” Bell Systems Technical Journal vol. 38 pp. 985-999, 1959.Google Scholar
  57. P. Maguire, V. Shankararaman, R. Szegfue, and L. Morss, “Application of Case-Based Reasoning to Software Reuse,” Progress in Case-Based Reasoning, Lecture Notes in Artificial Intelligence, I. Watson (ed.) Springer-Verlag, Berlin, 1995, pp. 165-174.Google Scholar
  58. M. L. Maher and A. G. de Silva Garza, “The Adaptation of Structural Systems Designs Using Genetic Algorithms,” Information Processing in Civil and Structural Engineering Design, CIVIL-COMP Press, 1996, pp. 189-196.Google Scholar
  59. B. Manderick, M. de Weger, and P. Spiessens, “The genetic algorithm and the structure of the fitness landscape,” in Proceedings of the 4th International Conference on Genetic Algorithms, R. K. Belew and L. B. Booker (eds.) Morgan Kaufmann, San Mateo, CA, 1991, pp. 143-150.Google Scholar
  60. D. Mange and M. Tomassini eds. in Bio-Inspired Computing Machines: Towards Novel Computational Architectures, Presses Polytechniques et Universitaires Romandes, 1998.Google Scholar
  61. E. McCluskey, “Minimization of Boolean functions,” Bell System Technical Journal vol. 35 pp. 1417-1444, 1956.Google Scholar
  62. Z. Michalewicz, Genetic AlgorithmsqData StructuressEvolution Programs, Springer-Verlag: Heidelberg, 1996, third edition.Google Scholar
  63. J. F. Miller, H. Luchian, P. V. G. Bradbeer, and P. J. Barclay, “Using a genetic algorithm for optimizing fixed polarity Reed-muller expansions of Boolean functions,” International Journal of Electronics vol. 76 pp. 601-609, 1994.Google Scholar
  64. J. F. Miller, P. Thomson, and T. Fogarty, “Designing Electronic Circuits Using Evolutionary Algorithms. Arithmetic Circuits: A Case Study,” Genetic Algorithms and Evolution Strategies in Engineering and Computer Science, D. Quagliarella, J. Periaux, C. Poloni, and G. Winter (eds.) Wiley, Chechester, UK, 1997, pp. 105-131.Google Scholar
  65. J. F. Miller and P. Thomson, “Evolving digital electronic circuits for real-valued function generation using a genetic algorithm,” Genetic Programming: Proceedings of the 3rd Annual Conference, J. R. Koza, W. Banzhaf, K. Chellapilla, K. Deb, M. Dorigo, D. B. Fogel, M. H. Garzon, D. E. Goldberg, H. Iba, and R. L. Riolo (eds.) Morgan Kaufmann, San Francisco, 1998, pp. 863-868.Google Scholar
  66. J. F. Miller and P. Thomson, “Aspects of digital evolution: Geometry and learning,” in Proceedings of the 2nd International Conference on Evolvable Systems: From Biology to Hardware, Lecture Notes in Computer Science, M. Sipper, D. Mange, and A. Perez-Uribe (eds.) Springer-Verlag, Heidelberg, 1998, vol. 1478, pp. 25-35.Google Scholar
  67. J. F. Miller and P. Thomson, “Aspects of digital evolution: Evolvability and architecture,” Parallel Problem Solving from Nature V, Lecture Notes in Computer Science, A. E. Eiben, T. Bäck, M. Schoenauer, and H.-P. Schwefel (eds.) Springer, Berlin, 1998, vol. 1498, pp. 927-936.Google Scholar
  68. J. F. Miller, “An empirical study of the efficiency of learning boolean functions using a Cartesian Genetic Programming Approach,” in Proceedings of the 1st Genetic and Evolutionary Computation Conference, W. Banzhaf, J. Daida, A. E. Eiben, M. Garzon, V. Honavar, M. Jakiela, and R. E. Smith (eds.) Morgan Kaufmann, San Francisco, CA, 1999, vol. 2, pp. 927-936.Google Scholar
  69. J. F. Miller, D. Job, and V. K. Vassilev, “Principles in the evolutionary design of digital circuits—Part I,” J. Genetic Programming and Evolvable Machines vol. 1 (1) 2000.Google Scholar
  70. J. F. Miller, D. Job, and V. K. Vassilev, “Principles in the evolutionary design of digital circuits—Part II,” J. Genetic Programming and Evolvable Machines vol. 1 (2) 2000, in press.Google Scholar
  71. M. Mitchell, S. Forrest, and J. Holland, “The royal road for genetic algorithms: Fitness landscapes and GA performance,” in Proceedings of the 1st European Conference on Artificial Life, J. Varela and P. Bourgine (eds.) MIT Press, Cambridge, MA, 1991, pp. 245-254.Google Scholar
  72. M. Mitchell, An Introduction to Genetic Algorithms, MIT Press: Cambridge, MA, 1996.Google Scholar
  73. J. M. Moreno, “VLSI Architectures for Evolutive Neural Models,” Universitat Politecnica de Catalunya, Barcelona, PhD thesis, 1994.Google Scholar
  74. Motorola, Motorola Semiconductor Technical Data: Advance Information Field Programmable Analog Array 20-cell Version MPAA020, Motorola Inc., 1997.Google Scholar
  75. M. Murakawa, S. Yoshizawa, T. Adachi, S. Suzuki, K. Takasuka, M. Iwata, and T. Higuchi, “Analogue EHW chip for intermediate frequency filters,” in Proceedings of the 2nd International Conference on Evolvable Systems: From Biology to Hardware, Lecture Notes in Computer Science, M. Sipper and D. Mange and A. Perez-Uribe (eds.) Springer-Verlag, Heidelberg, 1998, vol. 1478, pp. 134-143.Google Scholar
  76. R. Poli, “Evolution of graph-like programs with parallel distributed genetic programming,” in Proceed-ings of the 7th International Conference on Genetic Algorithms, T. Bäck (ed.) Morgan Kaufmann, San Francisco, CA, 1997, pp. 346-353.Google Scholar
  77. R. Poli, “Sub-machine-code GP: New results and extensions,” in Proceedings of the 2nd European Workshop on Genetic Programming, Lecture Notes in Computer Science, R. Poli, P. Nordin, W. B. Langdon, and T. Fogarty (eds.) Springer-Verlag, Heidelberg, 1999, vol. 1598, pp. 65-82.Google Scholar
  78. R. Poli, J. Page, and W. B. Langdon, “Smooth uniform crossover, sub-machine code gp and demes: A recipe for solving high-order boolean parity problems,” in Proceedings of the 1st Genetic and Evolutionary Computation Conference, W. Banzhaf, J. Daida, A. E. Eiben, M. H. Garzon, V. Honavar, M. Jakiela, and R. E. Smith (eds.) Morgan Kaufmann, San Francisco, CA, 1999, vol. 2, pp. 1162-1169.Google Scholar
  79. W. Quine, “The problem of simplifying truth functions,” American Mathematical Monthly vol. 59 pp. 521-531, 1952.Google Scholar
  80. C. M. Reidys and P. F. Stadler, “Neutrality in Fitness Landscapes, Santa Fe Institute,” No. 98-10-089, submitted to Appl. Math. & Comput., 1998.Google Scholar
  81. K. A. Ross and R. B. Wright, Discrete Mathematics, Prentice Hall: Englewood Cliffs, NJ, 1988.Google Scholar
  82. T. Sasao, Logic Synthesis and Optimization, Kluwer Academic Publishers: MA, 1993.Google Scholar
  83. H.-P. Schwefel, Numerical Optimization of Computer Models, John Wiley & Sons: Chichester, UK, 1981.Google Scholar
  84. A. Shen, S. Devadas, and A. Ghosh, “Probabilistic manipulation of Boolean functions using free Boolean diagrams,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems vol. 14 pp. 87-97, 1995.Google Scholar
  85. M. Sipper, Evolution of Parallel Cellular Machines: The Cellular Programming Approach, Lecture Notes in Computer Science, Springer-Verlag: Berlin, 1997, vol. 1194.Google Scholar
  86. M. Sipper, E. Sanchez, D. Mange, M. Tomassini, A. Perez-Uribe, and A. Stauffer, “A phylogenetic, ontogenetic, and epigenetic view of bio-inspired hardware systems,” IEEE Transactions on Evolu-tionary Computation vol. 1 (1) pp. 83-97, 1997.Google Scholar
  87. B. Smyth, “Case Based Design Department of Computer Science,” Trinity College, University of Dublin Ireland, PhD thesis, 1996.Google Scholar
  88. P. F. Stadler and W. Grünter, “Anisotropy in fitness landscapes,” J. Theor. Biol. vol. 165 pp. 373-388, 1993.Google Scholar
  89. P. F. Stadler, “Towards Theory of Landscapes,” Complex Systems and Binary Networks, R. Lopéz-Peñ a, R. Capovilla, R. García-Pelayo, H. Waelbroeck, and F. Zertuche (ed.) Springer-Verlag, Berlin, 1995, pp. 77-163.Google Scholar
  90. P. F. Stadler, “Landscapes and Their Correlation Functions,” Santa Fe Institute, No. 95-07-067, submitted to J. Math. Chem., 1995.Google Scholar
  91. P. F. Stadler and G. P. Wagner, “Algebraic theory of recombination spaces,” Evolutionary Computation vol. 5 (3) pp. 241-275, 1997.Google Scholar
  92. A. Stoica, A. Fukunaga, K. Hayworth, and C. Salazar-Lazaro, “Evolvable hardware for space applications,” in Proceedings of the 2nd International Conference on Evolvable Systems: From Biology to Hardware, Lecture Notes in Computer Science, M. Sipper and D. Mange and A. Perez-Uribe (eds.0 Springer-Verlag, Heidelberg, 1998, vol. 1478, pp. 166-173.Google Scholar
  93. A. Stoica, D. Keymeulen, R. Tawel, C. Salazar-Lazaro, and W. Li, “Evolutionary experiments with a fine-grained reconfigurable architecture for analog and digital CMOS circuits,” in Proceedings of the 1st NasarDoD Workshop on Evolvable Hardware, A. Stoica, D. Keymeulen, and J. Lohn (eds.) IEEE Computer Society, Los Alamitos, CA, 1999, pp. 76-84.Google Scholar
  94. A. Teller and M. Veloso, “PADO: Learning tree structured algorithms for orchestration into an object recognition system,” Department of Computer Science, Carnegie Mellon University, Pittsburgh, PA, No. CMU-CS-95-101, 1995.Google Scholar
  95. N. M. Thalmann and D. Thalmann (eds.) in Artificial Life and Virtual Reality, John Wiley, 1994.Google Scholar
  96. A. Thompson, “Silicon evolution,” in Proceedings of the 1st Annual Genetic Programming Conference, J. R. Koza et al. (ed.) MIT Press, Cambridge, MA, 1996, pp. 444-452.Google Scholar
  97. A. Thompson, “An evolved circuit, intrinsic in silicon, entwined with physics,” in Proceedings of the 1st International Conference on Evolvable Systems: From Biology to Hardware, Lecture Notes in Computer Science, T. Higuchi and M. Iwata (eds.) Springer-Verlag, Heidelberg, 1997, vol. 1259, pp. 390-405.Google Scholar
  98. A. Thompson, “On the automatic design of robust electronics through artificial evolution,” in Proceedings of the 2nd International Conference on Evolvable Systems: From Biology to Hardware, Lecture Notes in Computer Science, M. Sipper, D. Mange, and A. Peréz-Uribe (eds.) Springer-Verlag, Heidelberg, 1998, vol. 1478, pp. 13-24.Google Scholar
  99. A. Thompson, Hardware Evolution: Automatic Design of Electronic Circuits in Reconfigurable Hardware by Artificial Evolution, Springer-Verlag: London, 1998.Google Scholar
  100. A. Thompson, P. Layzell, and R. S. Zebulum, “Explorations in design space: Unconventional electronics design through artificial evolution,” IEEE Transactions on Evolutionary Computation vol. 4 (3) 1999, to appear.Google Scholar
  101. P. Thomson and J. F. Miller, “Symbolic method for simplifying AND-EXOR representations of Boolean functions using a binary decision technique and a genetic algorithm,” IEE Proceedings in Computers and Digital Techniques vol. 143 pp. 151-155, 1996.Google Scholar
  102. M. Tomassini and E. Sanchez (eds.) in Towards Evolvable Hardware: The Evolutionary Engineering Approach, Lecture Notes in Computer Science, Springer-Verlag, Berlin, 1996, vol. 1062.Google Scholar
  103. V. K. Vassilev, “An information measure of landscapes,” in Proceedings of the 7th International Conference on Genetic Algorithms, Th. Bäck (ed.) Morgan Kaufmann, San Francisco, CA, 1997, pp. 49-56.Google Scholar
  104. V. K. Vassilev, “Information analysis of fitness landscapes,” in Proceedings of the 4th European Conference on Artificial Life, P. Husbands and I. Harvey (eds.) MIT Press, Cambridge, MA, 1997, pp. 116-124.Google Scholar
  105. V. K. Vassilev, J. F. Miller, and T. C. Fogarty, “Digital circuit evolution and fitness landscapes,” in Proceedings of the Congress on Evolutionary Computation, IEEE Press, Piscataway, NJ, 1999, vol. 2, pp. 1299-1306.Google Scholar
  106. V. K. Vassilev, J. F. Miller, and T. C. Fogarty, “On the nature of two-bit multiplier landscapes,” in Proceedings of the 1st NASArDoD Workshop on Evolvable Hardware, A. Stoica, D. Keymeulen, and J. Lohn (eds.) IEEE Computer Society, Los Alamitos, CA, 1999, pp. 36-45.Google Scholar
  107. V. K. Vassilev, T. C. Fogarty, and J. F. Miller, “Information characteristics and the structure of landscapes,” Evolutionary Computation, 1999, in press. Available upon request.Google Scholar
  108. E. D. Weinberger, “Correlated and uncorrelated fitness landscapes and how to tell the difference,” Biological Cybernetics vol. 63 pp. 325-336, 1990.Google Scholar
  109. E. D. Weinberger, “Fourier and Taylor series on fitness landscapes,” Biological Cybernetics vol. 65 pp. 321-330, 1991.Google Scholar
  110. S. Wright, “The roles of mutation, inbreeding, crossbreeding and selection in evolution,” in Proceedings of the 6th International Conference on Genetics, D. F. Jones (ed.) 1932, vol. 1, pp. 356-366.Google Scholar
  111. J. Yarbrough, Digital Logic: Application and Design, West Publishing Company, 1997.Google Scholar
  112. R. S. Zebulum, M. A. Pacheco, and M. Vellasco, “Analog circuits evolution in extrinsic and intrinsic modes,” in Proceedings of the 2nd International Conference on Evolvable Systems: From Biology to Hardware, Lecture Notes in Computer Science, M. Sipper, D. Mange, and A. Peräz-Uribe (eds.) Springer-Verlag, Heidelberg, 1998, vol. 1478, pp. 154-165.Google Scholar
  113. R. S. Zebulum, M. A. Pacheco, and M. Vellasco, “Artificial evolution on active filters: A case study,” in Proceedings of the 1st NasarDoD Workshop on Evolvable Hardware, A. Stoica, D. Keymeulen, and J. Lohn (eds.) IEEE Computer Society, Los Alamitos, CA, 1999, pp. 66-75.Google Scholar

Copyright information

© Kluwer Academic Publishers 2000

Authors and Affiliations

  • Julian F. Miller
    • 1
  • Dominic Job
    • 2
  • Vesselin K. Vassilev
    • 3
  1. 1.School of Computer ScienceThe University of BirminghamBirminghamEngland
  2. 2.School of ComputingNapier UniversityEdinburghScotland
  3. 3.School of ComputingNapier UniversityEdinburghScotland

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