CMOS Programmable Imager Implementing Pre-Processing Operations

  • Khaled N. Salama
  • Ahmed M. El-Tawil
  • Ahmed M. Soliman
  • Hassan O. Elwan


The CMOS Imager presented integrates a 2D photoreceptor array with a nine input analog processor on the same focal plane. The analog processor is fully programmable, performing multiply-accumulate operations. A VLSI implementation of spatial convolution operations performed on images is presented. A modified photoreceptor is presented that is based on current mode for signal transmission, thus decreasing the effect of noise on the transmitted signal and increasing the sensitivity per decade. A novel decoding scheme was used to decode the required set of photoreceptors to be presented to the analog processor. Thus only one processor unit is needed whose inputs depend on the time state. A prototype system was fabricated that incorporates 15×15 pixels in a 2×2 mm2 using a 2 μm double metal, single poly process.

analog VLSI analog processor spatial convolution CMOS imager 


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Copyright information

© Kluwer Academic Publishers 1999

Authors and Affiliations

  • Khaled N. Salama
    • 1
  • Ahmed M. El-Tawil
    • 1
  • Ahmed M. Soliman
    • 1
  • Hassan O. Elwan
    • 2
  1. 1.Electronics and Communication Engineering DeptartmentCairo UniversityEgypt
  2. 2.Electrical Engineering DeptartmentOhio State UniversityUSA

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