Advertisement

Journal of Electronic Testing

, Volume 16, Issue 3, pp 179–184 | Cite as

A High-Level EDA Environment for the Automatic Insertion of HD-BIST Structures

  • Alfredo Benso
  • Silvia Cataldo
  • Silvia Chiusano
  • Paolo Prinetto
  • Yervant Zorian
Article

Abstract

This paper presents a High-Level EDA environment based on the Hierarchical Distributed BIST (HD-BIST), a flexible and reusable approach to solve BIST scheduling issues in System-on-Chip applications. HD-BIST allows activating and controlling different BISTed blocks at different levels of hierarchy, with a minimum overhead in terms of area and test time. Besides the hardware layer, the authors present the HD-BIST application layer, where a simple modeling language, and a prototypical EDA tool demonstrate the effectiveness of the automation of the HD-BIST insertion in the test strategy definition of a complex System-on-Chip.

built-in self-test embedded cores EDA tools 

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. 1.
    F. Beenker, R. Dekker, and R. Stans, “Implementing MACRO Test in Silicon Compiler Design,” IEEE Design & Test of Computers, Vol. 7(2), pp. 41-51, April 1990.Google Scholar
  2. 2.
    O.F. Haberl and T. Kropf, “HIST, A Methodology for the Automatic Insertion of a Hierarchical Self Test,” Proc. IEEE Int. Test Conference, 1992, pp. 732-741.Google Scholar
  3. 3.
    Y. Zorian, “A Distributed BIST Control Scheme for Complex VLSI Devices,” Proc. IEEE VLSI Test Symposium, April 1993, pp. 4-9.Google Scholar
  4. 4.
    A. Benso, S. Chiusano, P. Prinetto, and Y. Zorian, “HD-BIST: A Hierarchical Framework for BIST Scheduling and Diagnosis in SoCs,” Proc. IEEE Int. Test Conference, September 1999, pp. 993-1000.Google Scholar
  5. 5.
    http://grouper.ieee.org/groups/1500Google Scholar

Copyright information

© Kluwer Academic Publishers 2000

Authors and Affiliations

  • Alfredo Benso
    • 1
  • Silvia Cataldo
    • 2
  • Silvia Chiusano
    • 3
  • Paolo Prinetto
    • 4
  • Yervant Zorian
    • 5
  1. 1.Politecnico di Torino, Dip. Automatica e InformaticaCorso Duca degli Abruzzi 24Torino TOItaly
  2. 2.Politecnico di Torino, Dip. Automatica e InformaticaCorso Duca degli Abruzzi 24Torino TOItaly
  3. 3.Politecnico di Torino, Dip. Automatica e InformaticaCorso Duca degli Abruzzi 24Torino TOItaly
  4. 4.Politecnico di Torino, Dip. Automatica e InformaticaCorso Duca degli Abruzzi 24Italy
  5. 5.Logic VisionSan JoseUSA

Personalised recommendations