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Generalized switched-capacitor multilevel inverter topology with self-balancing capacitors

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Abstract

This paper presents a switched-capacitor topology with fewer switching components and reduced voltage stresses. The circuit contains eight switches and two capacitors to generate a five-level voltage waveform. This paper provides in-depth descriptions of the structural design, operation, and loss analysis. Inherently self-balanced capacitors are utilized in the proposed topology, which eliminates the need for additional charge balancing circuits and sensors. The control action was implemented using a simple logic-based multicarrier pulse width modulation (PWM) strategy. A brief comparative analysis with state-of-the-art topologies has been presented to demonstrate the merits of the developed topology. Finally, the feasibility and efficacy of the suggested topology have been evaluated using simulation and experimental testing to ensure that it is both feasible and effective.

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Authors and Affiliations

  1. School of Electrical enginering, Kalinga Institute of Industrial Technology (KIIT), Bhubaneswar, India

    Kasinath Jena & Chinmoy Kumar Panigrahi

  2. Department of Electrical and Instrumentation Engineering, Thapar Institute of Engineering and Technology (TIET), Patiala, India

    Krishna Kumar Gupta

  3. Department of Electrical Engineering, Maulana Azad National Institute of Technology (MANIT), Bhopal, India

    Dhananjay Kumar

  4. Department of Electrical Engineering, National Institute of Technology (NIT), Raipur, India

    Niraj Kumar Dewangan

Authors
  1. Kasinath Jena
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  2. Chinmoy Kumar Panigrahi
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  3. Krishna Kumar Gupta
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  4. Dhananjay Kumar
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  5. Niraj Kumar Dewangan
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Correspondence to Kasinath Jena.

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Jena, K., Panigrahi, C.K., Gupta, K.K. et al. Generalized switched-capacitor multilevel inverter topology with self-balancing capacitors. J. Power Electron. 22, 1617–1626 (2022). https://doi.org/10.1007/s43236-022-00456-4

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  • DOI: https://doi.org/10.1007/s43236-022-00456-4

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