Abstract
Artificial Neural Networks (ANNs) mirror the analytical functions of human neural networks. The performance of smart healthcare systems has been limited to the increasing size and intricacy of information. Several ANN architectures help in the analysis of EEG signals for the identification of epileptic seizures. However, real-time performance needs to be accurate and very quick. Consequently, it is important to design efficient ANN models without compromising the feasibility of hardware realization. Since, CPUs and GPUs are based on conventional bus-system architectures, processing large complex datasets decreases the efficiency, scalability and versatility of the systems. To counter the bottlenecks of the bus-based architectures, Network-on-Chip has been efficient for complex computations. In this paper, we develop NoC-based feed-forward neural network and convolutional neural network models for the identification of epileptic seizure by analysis of continuously monitored EEG signal. The trained neural network models are mapped onto the Network-on-Chip to increase the throughput, power efficiency, parallelism and scalability of the architecture. The performance of all models is thoroughly explored in terms of throughput, energy, latency and identification accuracy of an epileptic seizure.
Similar content being viewed by others
References
Sze V, Chen Y, Yang T, Emer JS. Efficient processing of deep neural networks: a tutorial and survey. Proc IEEE. 2017;105(12):2295–329. https://doi.org/10.1109/JPROC.2017.2761740.
Shokry A, Espuña A. The ordinary kriging in multivariate dynamic modelling and multistep-ahead prediction. Comput Aided Chem Eng. 2018;43:265–70.
Ullah I, Hussain M, Aboalsamh H. An automated system for epilepsy detection using EEG brain signals based on deep learning approach. Expert Syst Appl. 2018;107:61–71.
Usman SM, Usman M, Fong S. Epileptic seizures prediction using machine learning methods. Comput Math Methods Med. 2017;2017:1–10.
Hussein R, Palangi H, Ward R, Wang ZJ. Epileptic seizure detection: a deep learning approach. Electr Eng Syst Sci. 2018;16:53.
Acharya UR, Oh SL, Hagiwara Y, Tan JH, Adeli H. Deep convolutional neural network for the automated detection and diagnosis of seizure using EEG signals. Comput Biol Med. 2018;100:270–8.
Yuan Y, Xun G, Jia K, Zhang A. A multi-view deep learning method for epileptic seizure detection using short-time fourier transform. In: Proceedings of the 8th ACM international conference on bioinformatics, computational biology, and health informatics. 2017; pp. 213–22.
Paul Y. Various epileptic seizure detection techniques using biomedical signals: a review. Brain Inf. 2018;5(2):6.
AXM Chang, B Martini, E Culurciello. Recurrent neural networks hardware implementation on FPGA. IEEE international symposium on circuits and systems. 2015.
Mohammadi M, Pouyan AA, Khan NA, Abolghasemi V. Locally optimized adaptive directional time frequency distributions. Circuits Syst Signal Process. 2018;37(8):3154–74.
Wang Q, et al. A statistic approach for power analysis of integrated GPU. Soft Comput. 2019;23(3):827–36.
Kim J, et al. Design and analysis of an NoC architecture from performance, reliability and energy perspective. 2005 Symposium on architectures for networking and communications systems (ANCS). IEEE. 2005.
“comparison of network-on-chip and busses, White paper, Arteris. 2005
Furber S, et al. Overview of the SpiNNaker system architecture. Comput IEEE Trans. 2013;62:2454–67. https://doi.org/10.1109/TC.2012.142.
Mand NP, Robino F, Öberg J. Artificial neural network emulation on NOC based multi-core FPGA platform. NORCHIP 2012, Cpenhagen. 2012.
Akopyan F, et al. Truenorth: design and tool flow of a 65 mw 1 million neuron programmable neurosynaptic chip. Comput Aided Des Integr Circuits Syst IEEE Trans. 2015;34(10):1537–57.
Cawley S, et al. Hardware spiking neural network prototyping and application. Genet Program Evol Mach. 2011;12:257–80.
Holanda P et al. DHyANA: A NoC-based neural network hardware architecture. 2016; pp. 177–80.
Schemmel J et al. A wafer-scale neuromorphic hardware system for large-scale neural modeling,” in Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on, 2010; pp. 1947–50.
Kakoulli E, Soteriou V, Theocharides T. An artificial neural network-based hotspot prediction mechanism for NoCs. 2010 IEEE computer society annual symposium on VLSI, Lixouri, Kefalonia. 2010.
Wang B, Lu Z, Chen S. ANN based admission control for on-chip networks, 2019 56th ACM/IEEE design automation conference (DAC), Las Vegas, NV, USA. 2019.
Chen K, Wang T. NN-Noxim: high-level cycle-accurate NoC-based neural networks simulator. 2018 11th International workshop on network on chip architectures (NoCArc), Fukuoka. 2018.
Jimmy Chen K-C, George Wang T-Y, Andrew Yang Y-C. Cycle-accurate NoC-based convolutional neural network simulator. In: Proceedings of the international conference on omni-layer intelligent systems (COINS ‘19), Association for computing machinery, New York, NY, USA. 2019.
Chen KCJ, Ebrahimi M, Wang TY, Yang YC, Liao YH. A NoC-based simulator for design and evaluation of deep neural networks. Microprocessors and Microsystems, 2020.
Andrzejak RG, Lehnertz K, Rieke C, Mormann F, David P, Elger CE. Indications of nonlinear deterministic and finite dimensional structures in time series of brain electrical activity: dependence on recording region and brain state. Phys Rev E. 2001;64:061907.
Leng X, Xu N, Dong F, Zhou Z. Implementation and simulation of a cluster-based hierarchical noc architecture for multiprocessor soc. In: IEEE international symposium on communications and information technology. ISCIT 2005. 2005; 2: 1203–06.
Haowen F, Amar S, De M, Qinru Q. Scalable NoCbased neuromorphic hardware learning and inference. 2018 International joint conference on neural networks (IJCNN), 2018; pp. 1–8.
Svozil D, Kvasnicka V, Pospichal J. Introduction to multi-layer feed-forward neural networks. Chemom Intell Lab Syst. 1997;39(1):43–62.
Glorot, X, Antoine B, Yoshua B. Deep sparse rectifier neural networks. Proceedings of the fourteenth international conference on artificial intelligence and statistics. 2011.
Kiranyaz S, et al. 1D convolutional neural networks and applications: a survey. Mech Syst Signal Process. 2021;151:107398.
Lizhong C, Di Z, Pedram M, Pinkston TM. Power punch: towards non-blocking power-gating of NoC routers, high performance computer architecture (HPCA), 2015 IEEE 21st international symposium on.2015; pp. 378–89.
Mondal HK, Gade SH, Kishore R, Deb S. Adaptive multi-voltage scaling in wireless NoC for high performance low power applications. 2016 Design, automation and test in Europe conference and exhibition (DATE), Dresden, Germany, 2016; pp 1315–20.
Chen K, Ebrahimi M, Wang T, Yang Y. NoC-based DNN accelerator: a future design paradigm. In: Proceedings of the 13th IEEE/ACM International Symposium on Networks-on-Chip, 2019.
Jash A, Ghosh A, Noyel N, Patra R, Mondal HK. 3D-NoCNN: NoC based clustered architecture for neural networks. 2020 24th International symposium on VLSI design and test (VDAT), Bhubaneswar, India, 2020.
Ghosh A, Jash A, Patra R, Kumar Mondal H. NoCSNN: a scalable interconnect architecture for neuromorphic computing systems. 2020 International symposium on devices, circuits and systems (ISDCS), Howrah, India, 2020; pp. 1–6. https://doi.org/10.1109/ISDCS49393.2020.9263025.
Wu R, Wang Y, Zhao D. A low-cost deadlock-free design of minimal-table rerouted XY-routing for irregular wireless NoCs. Networks-on-Chip (NOCS), 2010 Fourth ACM/IEEE International symposium on, Grenoble, 2010; pp. 199–206.
Abadi M et al. Tensorflow: large-scale machine learning on heterogeneous distributed systems. arXiv preprint arXiv:1603.04467; 2016.
Vincenzo C, et al. Cycle-accurate network on chip simulation with Noxim. ACM Trans Model Comput Simul. 2016;27(1):1.
Mubeen S, Kumar S. Designing efficient source routing for mesh topology network on chip platforms. 2010 13th Euromicro conference on digital system design: architectures, methods and tools, Lille, 2010.
Tang M, Lin X. Injection level flow control for networks-on-chip (NoC). J Inf Sci Eng. 2011;27:1.
Author information
Authors and Affiliations
Corresponding author
Ethics declarations
Conflict of interest
On behalf of all the authors, the corresponding author states that there is no conflict of interest.
Additional information
Publisher's Note
Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.
This article is part of the topical collection “Hardware for AI, Machine Learning and Emerging Electronic Systems” guest edited by Himanshu Thapliyal, Saraju Mohanty and VS Kanchana Bhaaskaran.
Rights and permissions
About this article
Cite this article
Ghosh, A., Roy, A.P., Patra, R. et al. Designing Efficient NoC-Based Neural Network Architectures for Identification of Epileptic Seizure. SN COMPUT. SCI. 2, 363 (2021). https://doi.org/10.1007/s42979-021-00756-9
Received:
Accepted:
Published:
DOI: https://doi.org/10.1007/s42979-021-00756-9