Abstract
In this research paper, we present a comprehensive simulation study focused on a specific type of MOSFET called the triple material gate all around (GAA) MOSFET. The study incorporates an inner gate engineering approach, utilizing a high-K dielectric insulator to facilitate the downsizing of the device. Our investigation primarily compares the performance of the triple material gate GAA MOSFET with a similar MOSFET design incorporating triple material inner gate engineering. We evaluate a range of parameters, including drain current (ID), threshold voltage (Vth), transconductance (gm), higher-order transconductance (gm2, gm3, gm4), transconductance generation factor (TGF), second-order voltage coefficient (VIP2), and third-order voltage coefficient (VIP3). The findings of our study highlight the linearity analysis of the proposed device, particularly in the context of lower technology nodes. Based on our results, we posit that the triple material gate GAA MOSFET with inner gate engineering holds substantial promise as a potential candidate for future semiconductor applications. technologies.
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Jena, B., Bhol, K. & Nanda, U. Exploration of Linearity Analysis in Nanotube GAA MOSFET Through Simulation-Based Study Utilizing Multi-Material Gate Technique. Trans. Electr. Electron. Mater. (2024). https://doi.org/10.1007/s42341-024-00528-1
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DOI: https://doi.org/10.1007/s42341-024-00528-1