Memristor Based Full Adder Circuit for Better Performance

  • Muhammad KhalidEmail author
  • Sana Mukhtar
  • Mohammad Jawaid Siddique
  • Sumair Faisal Ahmed
Regular Paper


In this paper, we have designed memristor based AND, OR, and exclusive-OR (XOR) gates. With the help of these gates, memristor based full adder circuit has proposed. Simulation results of the proposed circuit including all above gates have been reported. Prominent improvement of the proposed circuit has been represented in power consumption 54.74%, delay 14.84%, and lesser transistor count with respect to conventional circuit.


Memristor Full adder Logic gates Power consumption Delay Transistor count 



Muhammad Khalid acknowledges DST-PURSE program, Central Instrumentation Facility (CIF), Jamia Millia Islamia Central University, New Delhi, for award of post doctoral fellowship.


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Copyright information

© The Korean Institute of Electrical and Electronic Material Engineers 2019

Authors and Affiliations

  • Muhammad Khalid
    • 1
    Email author
  • Sana Mukhtar
    • 2
  • Mohammad Jawaid Siddique
    • 2
  • Sumair Faisal Ahmed
    • 1
  1. 1.Central Instrumentation Facility (CIF)Jamia Millia IslamiaNew DelhiIndia
  2. 2.Department of Electronics EngineeringAligarh Muslim UniversityAligarhIndia

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