Abstract
As an emerging and promising technology, Time Sensitive Networking (TSN) can be widely used in many real-time systems such as Industrial Internet of Things (IIoT) and Cyber Physical System (CPS). TSN, while ensuring the bounded latency and jitter, exhibits the disadvantage of not being able to efficiently use the bandwidth resources in the guard band. In this paper, we propose an algorithm family named Packet-size Aware Shaping (PAS), which is inspired by abstracting the problem of utilizing the guard band to a classic Precedence-Constrained Knapsack Problem (PCKP). PAS works with the existing TSN standards, having achieved the goal of guaranteeing the end-to-end latency for scheduled time-sensitive applications while fully utilizing the available bandwidth in the guard band for others. Furthermore, we have proposed and implemented several hardware designs for both the current standard TSN scheduler and the programmable one. The simulation results show that the PAS family can achieve satisfying performance in maximizing the resource utilization in the guard band. The synthesis results on Xilinx Vivado show that our proposed Multi-group Push-In-First-Out (MPIFO) scheduler can achieve 100 Mpps scheduling rate for 1024 scheduling items, which is fast enough to support the high-speed TSN.
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Notes
In this paper, the term of packet actually refers to the Ethernet frame, but we do not distinguish between them, and use them interchangeably.
The size refers to the real occupation of each packet on the wire, containing the Ethernet frame, eight-byte headers in the physical layer, and 12-byte Inter Frame Gap (IFG).
This ordered rank setting obeys the SPS algorithm in the standard TSN scheduler, but it should be clear that our proposed three designs can support arbitrary rank settings.
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Acknowledgements
This work is supported by the Guangdong Basic and Applied Basic Research Foundation (No. 2019B1515120031), the Key-Area Research and Development Program of Guangdong Province (No. 2019B121204009), National Natural Science Foundations of China (No. 61432009, 61872420, 68172213), the project of “FANet: PCL Future Greater-Bay Area Network Facilities for Large-scale Experiments and Applications (No. LZC0019)”. This work is also partially supported by the NSF Award (No. 1646458) and any opinions, findings, and conclusions or recommendations expressed in this paper are those of the author(s) and do not necessarily reflect the views of the sponsors of the research.
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Zhang, C., Wang, Y., Yao, R. et al. Packet-size aware scheduling algorithms in guard band for time sensitive networking. CCF Trans. Netw. 3, 4–20 (2020). https://doi.org/10.1007/s42045-020-00031-0
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DOI: https://doi.org/10.1007/s42045-020-00031-0