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An Analysis of FPGA LUT Bias and Entropy for Physical Unclonable Functions

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A Correction to this article was published on 01 December 2023

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Abstract

Process variations within Field Programmable Gate Arrays (FPGAs) provide a rich source of entropy and are therefore well-suited for the implementation of Physical Unclonable Functions (PUFs). However, careful considerations must be given to the design of the PUF architecture as a means of avoiding undesirable localized bias effects that adversely impact randomness, an important statistical quality characteristic of a PUF. In this paper, we investigate a ring-oscillator (RO) PUF that leverages localized entropy from individual look-up table (LUT) primitives. A novel RO construction is presented that enables the individual paths through the LUT primitive to be measured and isolated at high precision, and an analysis is presented that demonstrates significant levels of localized design bias. The analysis demonstrates that delay-based PUFs that utilize LUTs as a source of entropy should avoid using FPGA primitives that are localized to specific regions of the FPGA, and instead, a more robust PUF architecture can be constructed by distributing path delay components over a wider region of the FPGA fabric. Compact RO PUF architectures that utilize multiple configurations within a small group of LUTs are particularly susceptible to these types of design-level bias effects. The analysis is carried out on data collected from a set of identically designed, hard macro instantiations of the RO implemented on 30 copies of a Zynq 7010 SoC.

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Author notes

  1. Jenilee Jao, Ian Wilcox, Sriram Thotakura, Calvin Chan, Jim Plusquellic, Biliana S. Paskaleva, and Pavel B. Bochev are authors who contributed equally to this work.

Authors and Affiliations

  1. ECE, University of New Mexico, 1 University of New Mexico, Albuquerque, 87131, NM, USA

    Jenilee Jao, Sriram Thotakura & Jim Plusquellic

  2. Component and System Analysis, Sandia National Laboratories, Eubank, Albuquerque, 87131, NM, USA

    Ian Wilcox & Biliana S. Paskaleva

  3. National Security Initiatives, University of Colorado, Boulder, 80301, CO, USA

    Calvin Chan

  4. Center for Computing Research, Sandia National Laboratories, Eubank, Albuquerque, 87123, NM, USA

    Pavel B. Bochev

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  1. Jenilee Jao
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Corresponding author

Correspondence to Jenilee Jao.

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Funding

This study is supported in part by the Laboratory Directed Research and Development program at Sandia National Laboratories, a multimission laboratory managed and operated by National Technology and Engineering Solutions of Sandia, LLC., a wholly owned subsidiary of Honeywell International, Inc., for the US Department of Energy’s National Nuclear Security Administration under contract DE-NA-0003525. This paper describes objective technical results and analysis. Any subjective view or opinions that might be expressed in the paper do not necessarily represent the views of the U.S. Department of Energy of the United States Government.

Competing Interests

The authors declare no competing interests.

Author Contributions

Jenilee Jao, Sriram Thotakura and Jim Plusquellic collected the data, prepared the figures and carried out the analysis. They also wrote the first draft. Ian Wilcox, Calvin Chan, Bilana S Paskaleva and Pavel B Bochev reviewed and edited the manuscript, adding discussion and content to the body of the manuscript. All authors reviewed and edited the final draft of the manuscript.

Data Availability

The datasets generated in this research project are not publicly available due to lack of a public upload site, but are available from the authors upon request.

Ethical Approval

Not applicable.

Additional information

Sandia National Laboratories is a multimission laboratory managed and operated by National Technology and Engineering Solutions of Sandia, LLC., a wholly owned subsidiary of Honeywell International, Inc., for the US Department of Energy’s National Nuclear Security Administration under contract DE-NA-0003525.

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Jao, J., Wilcox, I., Thotakura, S. et al. An Analysis of FPGA LUT Bias and Entropy for Physical Unclonable Functions. J Hardw Syst Secur 7, 110–123 (2023). https://doi.org/10.1007/s41635-023-00137-z

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