Skip to main content
Log in

Challenges and Opportunities in Analog and Mixed Signal (AMS) Integrated Circuit (IC) Security

  • Published:
Journal of Hardware and Systems Security Aims and scope Submit manuscript

Abstract

In the last decade and so, a large amount of research has been done to secure hardware. Security features such as physically unclonable function (PUF), hardware metering, and obfuscation have been developed to protect hardware from threats. Detection and avoidance techniques for IC counterfeiting and hardware Trojan have been introduced to protect the IC supply chain. Till now, research has focused on digital ICs, but analog and mixed signal (AMS) ICs which hold the highest share in the market have been neglected. The solutions developed in digital domain for digital ICs do not extend well to AMS ICs. Thus, a major portion of the IC market remains unsecured. In this paper, we described the challenges and limitations associated with AMS IC security research focusing on three major sections: AMS-enabled security, counterfeiting, and AMS hardware Trojans. We also express a vision for AMS security research.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Fig. 1
Fig. 2
Fig. 3
Fig. 4
Fig. 5
Fig. 6
Fig. 7
Fig. 8
Fig. 9
Fig. 10
Fig. 11

Similar content being viewed by others

References

  1. Tehranipoor M, Guin U, Forte D (2015) Counterfeit integrated circuits: detection and avoidance. Springer International Publishing

  2. Liu B, Gang Q (2016) VLSI supply chain security risks and mitigation techniques: a survey. Integr VLSI J 55:438–448

    Article  Google Scholar 

  3. Mishra P, Bhunia S, Tehranipoor M (2017) Hardware IP security and trust. Springer

  4. Tehranipoor M, Koushanfar F (2010) A survey of hardware Trojan taxonomy and detection. IEEE Des Test Comput 27(1):10–25

    Article  Google Scholar 

  5. Xiao K, Forte D, Jin Y, Karri R, Bhunia S, Tehranipoor M (2016) Hardware Trojans: lessons learned after one decade of research. ACM Trans Des Autom Electron Syst (TODAES) 22(1):6:1–6:23

    Google Scholar 

  6. Yang K, Hicks M, Dong Q, Austin T, Sylvester D (2016) A2: analog malicious hardware. In: 2016 IEEE symposium on security and privacy (SP), pp 18–37

  7. Guin U, Forte D, Tehranipoor M (2013) Anti-counterfeit techniques: from design to resign. In: 2013 14th International workshop on microprocessor test and verification, pp 89–94

  8. Top 5 counterfeited semiconductors: analog ICs top the list—solid state technology (2015). http://electroiq.com/blog/2012/04/top-5-counterfeited-semiconductors-analog-ics-top-the-list/

  9. Edward Suh G, Devadas S (2007) Physical unclonable functions for device authentication and secret key generation. In: Proceedings of the 44th Annual design automation conference, DAC ’07. ISBN 978-1-59593-627-1. ACM, New York, pp 9–14

  10. Forte D, Bhunia S, Tehranipoor M Ms (2017) Hardware protection through obfuscation. Springer

  11. Rahman MT, Forte D, Shi Q, Contreras GK, Tehranipoor M (2014) CSST: preventing distribution of unlicensed and rejected ICs by untrusted foundry and assembly. In: 2014 IEEE International symposium on defect and fault tolerance in VLSI and nanotechnology systems (DFT), pp 46–51

  12. Polianiel I (2016) Security aspects of analog and mixed-signal circuits. In: 2016 IEEE 21st International mixed-signal testing workshop (IMSTW), pp 1–6

  13. Quadir SE, Chen J, Forte D, Asadizanjani N, Shahbazmohamadi S, Wang L, Chandy J, Tehranipoor M (2016) A survey on chip to system reverse engineering. J Emerg Technol Comput Syst 13 (1):6:1–6:34. ISSN 1550-4832

    Article  Google Scholar 

  14. Maxim Integrated, White paper (2013). Energy measurement and security for the smart grid—too long overlooked

  15. Alvarez AB, Zhao W, Alioto M (2016) Static physically unclonable functions for secure chip identification with 1.9–5.8% native bit instability at 0.6–1 v and 15 fJ/bit in 65 nm. IEEE J Solid State Circ 51(3):763–775

    Article  Google Scholar 

  16. Li J, Seok M (2016) Ultra-compact and robust physically unclonable function based on voltage-compensated proportional-to-absolute-temperature voltage generators. IEEE J Solid State Circ 51(9):2192–2202

    Article  Google Scholar 

  17. Csaba G, Xueming J, Chen Q, Porod W, Schmidhuber J, Schlichtmann U, Lugli P, Rührmair U (2009) On-chip electric waves: an analog circuit approach to physical uncloneable functions. IACR Cryptol ePrint Archive 2009:246

    Google Scholar 

  18. Pengjun W, Xuelong Z, Yuejun Z, Jianrui L (2015) Design of a reliable PUF circuit based on R-2R ladder digital-to-analog convertor. J Semicond 36(7):075005

    Article  Google Scholar 

  19. Bryant T, Chowdhury S, Forte D, Tehranipoor M, Maghari N (2016) A stochastic approach to analog physical unclonable function. In: 2016 IEEE 59th International midwest symposium on circuits and systems (MWSCAS). IEEE, pp 1–4

  20. Majzoobi M, Ghiaasi G, Koushanfar F, Nassif SR (2011) Ultra-low power current-based PUF. In: 2011 IEEE International symposium of circuits and systems (ISCAS), pp 2071–2074

  21. Kalyanaraman M, Orshansky M (2013) Novel strong PUF based on nonlinearity of MOSFET subthreshold operation. In: 2013 IEEE International symposium on hardware-oriented security and trust (HOST), pp 13–18

  22. Chen Q et al. (2009) Analog circuits for physical cryptography. In: Proceedings of the 2009 12th International symposium on integrated circuits, pp 121–124

  23. Deyati S, Muldrey BJ, Singh AD, Chatterjee A (2015) Challenge engineering and design of analog push pull amplifier based physically unclonable function for hardware security. In: 2015 IEEE 24th Asian test symposium (ATS), pp 127–132

  24. Tanougast C (2011) Hardware implementation of chaos based ciphe: design of embedded systems for security applications. Springer, Berlin, pp 297–330

    MATH  Google Scholar 

  25. Alvarez G, Li S (2006) Some basic cryptographic requirements for chaos-based cryptosystems. Int J Bifur Chaos 16(08):2129–2151

    Article  MathSciNet  MATH  Google Scholar 

  26. Pecora LM, Carroll TL (1990) Synchronization in chaotic systems. Phys Rev Lett 64(8):821

    Article  MathSciNet  MATH  Google Scholar 

  27. Mandal S, Banerjee S (2004) Analysis and CMOS implementation of a chaos-based communication system. IEEE Trans Circ Syst I: Regular Papers 51(9):1708–1722

    Article  Google Scholar 

  28. Delgado-Restituto M, Acosta AJ, Rodríguez-Vázquez A (2005) A mixed-signal integrated circuit for FM-DCSK modulation. IEEE J Solid-state Circ 40(7):1460–1471

    Article  Google Scholar 

  29. Katz O, Ramon DA, Wagner IA (2008) A robust random number generator based on a differential current-mode chaos. IEEE Trans Very Large Scale Integr (VLSI) Syst 16(12):1677–1686

    Article  Google Scholar 

  30. Wang C-C, Huang J-M, Cheng H-C, Hu R (2005) Switched-current 3-bit CMOS 4.0-MHz wideband random signal generator. IEEE J Solid-state Circ 40(6):1360–1365

    Article  Google Scholar 

  31. Ergün S, Özoguz S (2005) A truly random number generator based on a continuous-time chaotic oscillator for applications in cryptography. Springer, Berlin, pp 205–214. ISBN 978-3-540-32085-2

    Google Scholar 

  32. Kocarev L, Sterjev M, Fekete A, Vattay G (2004) Public-key encryption with chaos. Chaos: Interdiscip J Nonlinear Sci 14(4):1078–1082

    Article  MathSciNet  MATH  Google Scholar 

  33. GIDEP (2015). http://www.gidep.org/

  34. White Horse Laboratories (2015). http://archive.constantcontact.com

  35. Alam M, Shen H, Asadizanjani N, Tehranipoor M, Forte D (2017) Impact of X-ray tomography on the reliability of integrated circuits. IEEE Trans Dev Mater Reliab 17(1):59–68

    Article  Google Scholar 

  36. Alam MM, Tehranipoor M, Forte D (2016) Recycled FPGA detection using exhaustive LUT path delay characterization. In: 2016 IEEE International test conference (ITC), pp 1–10

  37. Huang K, Liu Y, Korolija N, Carulli J M, Makrisu Y (2015) Recycled IC detection based on statistical methods. IEEE Trans Comput-Aided Des Integr Circ Syst 34(6):947–960

    Article  Google Scholar 

  38. Zhang X, Xiao K, Tehranipoor M (2012) Path-delay fingerprinting for identification of recovered ICs. In: 2012 IEEE International symposium on defect and fault tolerance in VLSI and nanotechnology systems (DFT), pp 13–18

  39. Chang D, Ozev S, Sinanoglu O, Karri R (2014) Approximating the age of RF/analog circuits through re-characterization and statistical estimation. In: 2014 Design, automation test in europe conference exhibition (DATE), pp 1–4

  40. Rahman TM, Rahman F, Forte D, Tehranipoor M (2015) An aging-resistant RO-PUF for reliable key generation. IEEE Trans Emerg Top Comput PP(1):1–1

    Google Scholar 

  41. Guin U, Zhang X, Forte D, Tehranipoor M (2014) Low-cost on-chip structures for combating die and IC recycling. In: Proceedings of the 51st annual design automation conference, DAC ’14. ACM, pp 87:1–87:6. ISBN 978-1-4503-2730-5

  42. Chakraborty RS, Bhunia S (2009) Harpoon: an obfuscation-based SoC design methodology for hardware protection. IEEE Trans Comput-Aided Des Integr Circ Syst 28(10):1493–1502

    Article  Google Scholar 

  43. Rao VV, Savidis I (2017) Parameter biasing obfuscation for analog IP protection. In: International symposium on hardware oriented security and trust (HOST), pp 1493–1502

  44. Wang J et al (2017) Thwarting analog IC piracy via combinational locking to appear in International Test Conference (ITC)

  45. Contreras GK, Rahman MT, Tehranipoor M (2013) Secure split-test for preventing IC piracy by untrusted foundry and assembly. In: 2013 IEEE International symposium on defect and fault tolerance in VLSI and nanotechnology systems (DFTS), pp 196–203

  46. Use analog ASICs to eliminate the threat posed by counterfeit chips (2017). http://anysilicon.com/use-analog-asics-eliminate-threat-posed-counterfeit-chips/

  47. Tehranipoor M, Wang C (2011) Introduction to hardware security and trust. Springer Science & Business Media

  48. Huang H, Boyer A, Ben Dhia S, Vrignon B (2015) Prediction of aging impact on electromagnetic susceptibility of an operational amplifier. In: 2015 Asia-Pacific symposium on electromagnetic compatibility (APEMC), pp 86–89

  49. Wu J, Boyer A, Li J, Vrignon B, Ben Dhia S, Sicard E, Shen R (2014) Modeling and simulation of LDO voltage regulator susceptibility to conducted EMI. IEEE Trans Electromagn Compat 56(3):726–735

    Article  Google Scholar 

  50. Karri R, Rajendran J, Rosenfeld K, Tehranipoor M (2010) Trustworthy hardware: identifying and classifying hardware Trojans, vol 43

  51. Nahiyan A, Tehranipoor M (2017) Code coverage analysis for IP trust verification. In: Hardware IP security and trust, pp 39–46

  52. Chakraborty RS, Narasimhan S, Bhunia S (2009) Hardware Trojan: threats and emerging solutions. In: High level design validation and test workshop, 2009. HLDVT 2009. IEEE International, pp 166–171

  53. Dunbar C, Qu G (2014) Designing trusted embedded systems from finite state machines. ACM Trans Embed Comput Syst 13(5s):153:1–153,20

    Article  Google Scholar 

  54. Shiyanovskii Y, Wolff F, Rajendran A, Papachristou C, Weyer D, Clay W (2010) Process reliability based Trojans through NBTI and HCI effects. In: 2010 NASA/ESA Conference on adaptive hardware and systems, pp 215–222

  55. Salmani H, Tehranipoor M, Karri R (2013) On design vulnerability analysis and trust benchmarks development. In: 2013 IEEE 31st International conference on computer design (ICCD), pp 471–474

  56. Agrawal D, Baktir S, Karakoyunlu D, Rohatgi P, Sunar B (2007) Trojan detection using IC fingerprinting. In: 2007 IEEE Symposium on security and privacy (SP ’07), pp 296–310

  57. Jin Yier, Makris Y (2008) Hardware Trojan detection using path delay fingerprint. In: 2008 IEEE International workshop on hardware-oriented security and trust, pp 51–57

  58. Forte D, Bao C, Srivastava A (2013) Temperature tracking: an innovative run-time approach for hardware Trojan detection. In: Proceedings of the international conference on computer-aided design, ICCAD ’13. IEEE Press, Piscataway, pp 532–539

    Google Scholar 

  59. Chakraborty RS, Bhunia S (2009) Security against hardware Trojan through a novel application of design obfuscation. In: 2009 IEEE/ACM International conference on computer-aided design - digest of technical papers, pp 113–116

  60. Vaidyanathan K, Das BP, Sumbul E, Liu R, Pileggi L (2014) Building trusted ICs using split fabrication. In: 2014 IEEE International symposium on hardware-oriented security and trust (HOST), pp 1–6

  61. Xiao K, Forte D, Tehranipoor MM (2015) Efficient and secure split manufacturing via obfuscated built-in self-authentication. In: 2015 IEEE International symposium on hardware oriented security and trust (HOST), pp 14–19

  62. Liu Y, Jin Y, Makris Y (2013) Hardware Trojans in wireless cryptographic ICs: silicon demonstration & detection method evaluation. In: 2013 IEEE/ACM International conference on computer-aided design (ICCAD), pp 399–404

  63. Jin Y, Makris Y (2010) Hardware Trojans in wireless cryptographic ICs. IEEE Design Test Comput 27 (1):26–35

    Article  Google Scholar 

  64. Wang Q, Geiger RL, Chen D (2015) Hardware Trojans embedded in the dynamic operation of analog and mixed-signal circuits. In: 2015 National aerospace and electronics conference (NAECON), pp 155–158

  65. Wang YT, Wang Q, Chen D, Geiger RL (2014) Hardware Trojan state detection for analog circuits and systems. In: NAECON 2014 - IEEE National aerospace and electronics conference, pp 364–367

  66. Cao X, Wang Q, Geiger R L, Chen D J (2015) A hardware Trojan embedded in the Inverse Widlar reference generator. In: 2015 IEEE 58th International midwest symposium on circuits and systems (MWSCAS), pp 1–4

  67. Cai C, Chen D (2015) Performance enhancement induced Trojan states in op-amps, their detection and removal. In: 2015 IEEE International symposium on circuits and systems (ISCAS), pp 3020–3023

  68. Muldrey B, Deyati S, Giardino M, RAVAGE A (2013) RAVAGE: post-silicon validation of mixed signal systems using genetic stimulus evolution and model tuning. In: 2013 IEEE 31st VLSI Test symposium (VTS), pp 1–6

  69. Jin Y, Maliuk D, Makris Y (2012) Post-deployment trust evaluation in wireless cryptographic ICs. In: 2012 Design, automation test in europe conference exhibition (DATE), pp 965–970

  70. Wang YT, Chen DJ, Geiger RL (2013) Effectiveness of circuit-level continuation methods for Trojan state elimination verification. In: 2013 IEEE 56th International midwest symposium on circuits and systems (MWSCAS), pp 1043–1046

  71. Li Y, Chen D (2014) Efficient analog verification against Trojan states using divide and contraction method. In: 2014 IEEE International symposium on circuits and systems (ISCAS), pp 281–284

  72. Liu S, Geiger RL, Chen D (2014) A graphical method for identifying positive feedback loops automatically in self-biasing circuit for determining the uniqueness of operating points. In: NAECON 2014 - IEEE National aerospace and electronics conference, pp 384–390

  73. Liu Z, Li Y, Duan Y, Geiger RL, Chen D (2014) Identification and break of positive feedback loops in Trojan states vulnerable circuits. In: 2014 IEEE International symposium on circuits and systems (ISCAS), pp 289–292

Download references

Funding

The authors would like to acknowledge the supports from the National Science Foundation grant (CCSS-1610075) and National Institute of Standards and Technology grant (P0013638).

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to Md Mahbub Alam.

Rights and permissions

Reprints and permissions

About this article

Check for updates. Verify currency and authenticity via CrossMark

Cite this article

Alam, M.M., Chowdhury, S., Park, B. et al. Challenges and Opportunities in Analog and Mixed Signal (AMS) Integrated Circuit (IC) Security. J Hardw Syst Secur 2, 15–32 (2018). https://doi.org/10.1007/s41635-017-0024-z

Download citation

  • Received:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s41635-017-0024-z

Keywords

Navigation