Advertisement

Journal of Hardware and Systems Security

, Volume 1, Issue 2, pp 137–155 | Cite as

Systematic Correlation and Cell Neighborhood Analysis of SRAM PUF for Robust and Unique Key Generation

  • M. Tauhidur RahmanEmail author
  • Alison Hosey
  • Zimu Guo
  • Jackson Carroll
  • Domenic Forte
  • Mark Tehranipoor
Article

Abstract

A physical unclonable function (PUF) is a structure that produces a unique response, with an issued challenge (input), which can be used as an identifier or a cryptographic key. SRAM PUFs create unique responses upon power up as certain SRAM cells output a “1” or “0” with high probability due to uncontrollable process variations. A current challenge in SRAM PUFs is their sensitivity to temperature and voltage variations as well as aging. It is always challenging to make SRAM PUFs reliable and unique with algorithms that isolate stable and uncorrelated bits quickly with minimal testing (enrollment). In this paper, we explore the selection of stable and uncorrelated bits through enrollment under different conditions (temperature and voltage) and also by exploiting previously undiscovered interactions between neighboring SRAM cells. We propose neighbor influenced cell selection algorithm (NICSA) with the help of metrics that analyze the impact of each neighboring cell and each enrollment condition. The proposed NICSA helps to identify the “best” cells and conditions for stable bit selection. Besides reliability, SRAM PUF can be less unique due to systematic correlation among chips. We study the systematic correlation between SRAMs power-up values to find the uncorrelated cells among chips for better uniqueness. We have analyzed data from 5 ISSI, 3 IDT, and 3 Cypress SRAMs and our metrics identify the best neighborhood size (16 stable neighbors) and best enrollment condition pair high temperature, high voltage, and low temperature for NICSA.

Keywords

SRAM-PUF Low-cost PUF SRAM PUF reliability SRAM PUF neighborhood Robust SRAM PUF 

Notes

Acknowledgments

This work was supported in part by the National Science Foundation (NSF) under grant CNS-1561023 and by the Semiconductor Research Corporation (SRC) under contracts 2572 and 2648.

References

  1. 1.
    Tauhidur Rahman M et al (2014) CSST: preventing distribution of unlicensed and rejected ICs by untrusted foundry and assembly. In: IEEE Int. symposium on defect and fault tolerance symposium (DFTS)Google Scholar
  2. 2.
    Herder C et al (2014) Physical unclonable functions and applications: a tutorial. Proc IEEE 102:1126–1141CrossRefGoogle Scholar
  3. 3.
    Maes R et al (2010) Physically unclonable functions: a study on the state of the art and future research directions, section 1. towards hardware-intrinsic security. SpringerGoogle Scholar
  4. 4.
    Eiroa S et al (2012) Reducing bit flipping problems in SRAM physical unclonable functions for chip identification. In: 19th IEEE int. conf. on electronics, circuits and systems (ICECS), pp 392–395Google Scholar
  5. 5.
    Holcomb D et al (2009) Power-up SRAM state as an identifying fingerprint and source of true random numbers. IEEE Trans ComputGoogle Scholar
  6. 6.
    Su Y et al (2008) A digital 1.6 pJ/Bit chip identification circuit using process variations. IEEE J Solid-State Circ 43(1):69–77CrossRefGoogle Scholar
  7. 7.
    Yu M, Devadas S (2010) Secure and robust error correction for physical unclonable functions. IEEE Des Test Comput 27(1): 48–65CrossRefGoogle Scholar
  8. 8.
    Xiao K et al (2014) Bit selection algorithm suitable for high-volume production of SRAM-PUF. IEEE Int Symp Hardware-Oriented Secur Trust, pp 101Google Scholar
  9. 9.
    Hosey A et al (2014) Advanced analysis of cell stability for reliable SRAM PUFs. In: 2014 IEEE 23rd Asian test symposium (ATS), pp 348–353Google Scholar
  10. 10.
    Maes R et al (2009) A soft decision helper data algorithm for SRAM PUFs. In: ISIT 2009 IEEE International symposium on information theory, pp 2101–2105Google Scholar
  11. 11.
    van der Leest V et al (2012) Soft decision error correction for compact memory-based PUFs using a single enrollment. In: Cryptographic hardware and embedded systems, CHES 2012, volume 7428 of LNCS. Springer, Berlin, pp 268–282Google Scholar
  12. 12.
    Maes R, van der Leest V (2014) Countering the effects of silicon aging on SRAM PUFs. In: 2014 IEEE International symposium on hardware-oriented security and trust (HOST), pp 148– 153Google Scholar
  13. 13.
    Hofer M, et al. (2010) An alternative to error correction for sram-like pufs. Cryptograph Hardware Embedded Syst 335–350Google Scholar
  14. 14.
    Garg A, Kim TT (2014) Design of SRAM PUF with improved uniformity and reliability utilizing device aging effect. In: IEEE International symposium on circuits and systems (ISCAS), pp 1941–1944Google Scholar
  15. 15.
    Zheng Y et al (2013) RESP: a robust physical unclonable function retrofitted into embedded SRAM array. In: 50th ACM/IEEE design automation conference (DAC)Google Scholar
  16. 16.
    Bhargava M et al (2012) Reliability enhancement of bi-stable PUFs in 65nm bulk CMOS. In: IEEE Intl symposium on hardware-oriented security trust (HOST)Google Scholar
  17. 17.
    Cortez M et al (2013) Adapting voltage ramp-up time for temperature noise reduction on memory-based PUFs. In: IEEE Intl symposium on hardwareoriented security trust (HOST)Google Scholar
  18. 18.
    Tauhidur Rahman M et al (2015) A pair selection algorithm for robust RO-PUF against environmental variations and aging. In: IEEE International conference on computer design (ICCD)Google Scholar
  19. 19.
    Tauhidur Rahman M et al (2014) TI-TRNG: technology independent true random number generator. In: Proceedings of the the 51st annual design automation conference on design automation conference (DAC), pp 179:1–179:6Google Scholar
  20. 20.
    Merl D et al (2011) Side-channel analysis of PUFs and fuzzy extractors. In: McCune J M, Balacheff B, Perrig A, Sadeghi A-R, Sasse A, Beres Y (eds) Trust and trustworthy computing (TRUST), ser. LNCS, vol 6740. Springer, pp 33–47Google Scholar
  21. 21.
    Xu SQ et al (2014) Understanding sources of variations in flash memory for physical unclonable functions. In: IEEE 6th international memory workshop, pp 1–4Google Scholar
  22. 22.
    Mazady A et al (2015) Memristor PUF–a security primitive: theory and experiment. IEEE J Emerging Select Topics Circ Syst 5(2):222–229CrossRefGoogle Scholar
  23. 23.
    Tauhidur Rahman M et al (2016) An aging-resistant RO-PUF for reliable key generation. IEEE Trans Emerg Topics Comput PP(99):1Google Scholar
  24. 24.
    Sarangi SR et al (2008) VARIUS: a model of process variation and resulting timing errors for microarchitects. IEEE Trans Semicond Manuf 21(1):3–13CrossRefGoogle Scholar
  25. 25.
    Onabajo M, Silva-Martinez J (2012) Process variation challenges and solutions approaches. In: Analog circuit design for process variation-resilient systems-on-a-chip, p 930Google Scholar
  26. 26.
    Aktouf C (2002) A complete strategy for testing an on-chip multiprocessor architecture. Des Test Comput 19:18CrossRefGoogle Scholar
  27. 27.
    Bae J et al (2012) Characterizing the capacitive crosstalk in SRAM cells using negative bit-line voltage stress. IEEE Trans Instrum Measur 61:3259–3272CrossRefGoogle Scholar
  28. 28.
    Stine BE et al (1997) Analysis and decomposition of spatial variation in integrated circuit processes and devices. IEEE Trans Semicond Manuf 10(1):24–41CrossRefGoogle Scholar
  29. 29.
    Rukhin A et al (2010) A statistical test suite for random and pseudorandom number generators for cryptographic applications. NIST Special Publication 800-22 Rev1aGoogle Scholar
  30. 30.
    Maiti A et al (2013) A systematic method to evaluate and compare the performance of physical unclonable functions. In: Athanas P, Pnevmatikatos D, Sklavos N (eds) Embedded systems design with FPGAs. Springer, New York, pp 245–267Google Scholar
  31. 31.
    Delvaux J, Verbauwhede I (2014) Key-recovery attacks on various RO PUF constructions via helper data manipulation. In: Design, automation & test in europe conference & exhibition, DATE 2014. Dresden, p 16Google Scholar
  32. 32.
    Merli D et al (2013) Protecting PUF error correction by codeword masking. In: Proc. IACR cryptology eprint archive. Buenos Aires, p 334Google Scholar
  33. 33.
    Hiller M et al (2013) Breaking through fixed PUF block limitations with differential sequence coding and convolutional codes. In: Proceedings of the 3rd international workshop on trustworthy embedded devices, pp 04–04Google Scholar
  34. 34.
    Armknecht F et al (2009) Memory leakage-resilient encryption based on physically unclonable functions. In: Advances in cryptology (ASIACRYPT), ser. LNCS, vol 5912, pp 685–702Google Scholar
  35. 35.
    Dodis Y et al (2004) Fuzzy extractors: how to generate strong keys from biom etrics and other noisy data. In: Proc. Eurocrypt, pp 523–540Google Scholar
  36. 36.
    Maes R et al Secure key generation from biased PUFs. In: Proc. Cryptographic hardware and embedded systems, CHES 2015, vol 9293 of LNCS, pp 517–534Google Scholar
  37. 37.
    Van Herrewege A et al (2013) DEMO: inherent PUFs and secure PRNGs on commercial off-the-shelf microcontrollers. In: Proceedings of the 2013 ACM SIGSAC conference on computer communications security. Hangzhou, pp 1333–1336Google Scholar
  38. 38.
    Schrijen GJ, van der Leest V Comparative analysis of sram memories used as puf primitives. In: Proceedings of the conference on design, automation and test in Europe, pp 1319–1324Google Scholar
  39. 39.
    Dogan H et al Aging analysis for recycled fpga detection. In: 2014 IEEE international symposium on defect and fault tolerance in VLSI and nanotechnology systems (DFT), pp 171–176Google Scholar
  40. 40.
    Koeberl P et al Entropy loss in PUF-based key generation schemes: the repetition code pitfall. In: Proc. Int. symp. hardw.-orient. security trust (HOST), pp 44–49Google Scholar
  41. 41.
    Herder C et al Trapdoor computational fuzzy extractors, [Online]. Cryptology ePrint Archive, Rep. 2014/938. Available: http://eprint.iacr.org/
  42. 42.
    Maes R et al (2012) PUFKY: a fully functional PUF-based cryptographic key generator. In: Proceedings of the 14th international conference on cryptographic hardware and embedded systems, pp 302–319Google Scholar
  43. 43.
    Suzuki D, Shimizu K (2010) The glitch PUF: a new delay-PUF architecture exploiting glitch shapes. In: Cryptographic hardware and embedded systems, pp 366–382Google Scholar
  44. 44.
    Chuang C-T et al (2007) High-performance SRAM in nanoscale CMOS: design challenges and techniques. In: 2007 IEEE international workshop on memory technology, design and testing. Taipei, pp 4–12Google Scholar
  45. 45.
    Xu X (2015) Reliable physical unclonable functions using data retention voltage of SRAM cells. IEEE Trans Comput-Aided Des Integr Circ Syst 34(6):903–914CrossRefGoogle Scholar
  46. 46.
    Kinseher J et al (2016) Improving testability and reliability of advanced SRAM architectures. IEEE Trans Emerg Topics Comput PP(99):1–1Google Scholar
  47. 47.
    Vijayakumar A et al (2016) On testing physically unclonable functions for uniqueness. In: 2016 17th International symposium on quality electronic design (ISQED), pp 368–373Google Scholar
  48. 48.
    Sumikawa N et al (2012) An experiment of burn-in time reduction based on parametric test analysis. Proc Intl Test Conf 1–1Google Scholar

Copyright information

© Springer International Publishing AG 2017

Authors and Affiliations

  • M. Tauhidur Rahman
    • 1
    Email author
  • Alison Hosey
    • 3
  • Zimu Guo
    • 2
  • Jackson Carroll
    • 2
  • Domenic Forte
    • 2
  • Mark Tehranipoor
    • 2
  1. 1.University of Alabama in HuntsvilleHuntsvilleUSA
  2. 2.University of FloridaGainesvilleUSA
  3. 3.University of ConnecticutStorrsUSA

Personalised recommendations