Skip to main content
SpringerLink
Log in

A modified SOGI-FLL algorithm with DC-offset rejection improvement for single-phase inverter applications

  • Published:
International Journal of Dynamics and Control Aims and scope Submit manuscript

Abstract

By the growing penetration of distributed power generation, it is vital to provide power with a satisfying power factor to the grid. Hence, the grid voltage needs to be accurately monitored to synchronize the injected current with the grid voltage. Phase-locked loops (PLLs) are responsible for extracting the phase, frequency, and amplitude of the grid voltage in the control unit of a grid-tied inverter. The proper and fast estimation of grid information under grid disturbances has a significant role in the system’s stability. In this study, a modified phase-locked loop (PLL) algorithm based on a new frequency-locked loop (FLL) structure is proposed. The proposed modified PLL algorithm has a high-speed performance in estimating the phase, frequency, and amplitude of the grid voltage. Unlike conventional PLL-based FLLs, the phase shift variation in the proposed algorithm does not affect frequency estimation. Moreover, the proposed modified PLL algorithm doesn’t have the drawback of the input DC offset due to the use of the DC offset rejection loop. The proposed PLL structure mitigates the DC offset with a proper speed, and the response speed is enhanced. The control algorithms in this study have been implemented via a creative method. This technique can be applied in cheaper microcontrollers like Arduino Duo so that the monitoring speed is enhanced. Besides, the settling time for the tracking has been enhanced. The proposed approach has been simulated in MATLAB/Simulink environment. The experimental results have also been included to confirm the simulation results and the validity of the proposed method.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Log in via an institution

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Fig. 1
Fig. 2
Fig. 3
Fig. 4
Fig. 5
Fig. 6
Fig. 7
Fig. 8
Fig. 9
Fig. 10
Fig. 11
Fig. 12
Fig. 13
Fig. 14
Fig. 15
Fig. 16
Fig. 17
Fig. 18
Fig. 19
Fig. 20
Fig. 21
Fig. 22
Fig. 23
Fig. 24
Fig. 25
Fig. 26
Fig. 27

Similar content being viewed by others

Data availability

Not applicable.

Code availability:

Not applicable.

References

  1. Ruan X, Wang X, Pan D, Yang D, Li W, Bao C (2018) Control techniques for LCL-type grid-connected inverters. Springer, New York

    Book  MATH  Google Scholar 

  2. Rasekh N, Hosseinpour M (2020) LCL filter design and robust converter side current feedback control for grid-connected Proton Exchange Membrane Fuel Cell system. Int J Hydrogen Energy. https://doi.org/10.1016/j.ijhydene.2020.02.227

    Article  Google Scholar 

  3. Rasekh N, Rahimian MM, Hosseinpour M, Dejamkhooy A, Akbarimajd A (2019) A step by step design procedure of PR controller and capacitor current feedback active damping for a LCL-type grid-tied T-type inverter. In: Proceedings of the 2019 10th international power electronics, drive systems and technologies conference (PEDSTC), 2019: IEEE, pp. 612–617. DOI: https://doi.org/10.1109/PEDSTC.2019.8697853

  4. Golestan S, Monfared M, Freijedo FD, Guerrero JM (2012) Dynamics assessment of advanced single-phase PLL structures. IEEE Trans Ind Elect 60(6):2167–2177. https://doi.org/10.1109/PEDSTC.2019.8697853

    Article  Google Scholar 

  5. Patjoshi RK, Panigrahi R, Rout SS (2021) A hybrid fuzzy with feedback integral phase locked loop-based control strategy for unified power quality conditioner. Trans Instit Measur Control 43(1):122–136. https://doi.org/10.1177/0142331220933760

    Article  Google Scholar 

  6. Ullah I, Ashraf M (2019) Comparison of synchronization techniques under distorted grid conditions. IEEE Access 7:101345–101354. https://doi.org/10.1109/ACCESS.2019.2930530

    Article  Google Scholar 

  7. Guo X-Q, Wu W-Y, Gu H-R (2011) Phase locked loop and synchronization methods for grid-interfaced converters: a review. Przeglad Elektrotechniczny 87(4):182–187

    Google Scholar 

  8. Rodríguez P, Luna A, Candela I, Mujal R, Teodorescu R, Blaabjerg F (2010) Multiresonant frequency-locked loop for grid synchronization of power converters under distorted grid conditions. IEEE Trans Ind Elect 58(1):127–138. https://doi.org/10.1109/TIE.2010.2042420

    Article  Google Scholar 

  9. Rodriguez P, Luna A, Ciobotaru M, Teodorescu R, Blaabjerg F (2006) Advanced grid synchronization system for power converters under unbalanced and distorted operating conditions. In: IECON 2006–32nd annual conference on IEEE industrial electronics, 2006: IEEE, pp. 5173–5178. DOI: https://doi.org/10.1109/IECON.2006.347807

  10. Golestan S, Guerrero JM, Vasquez JC (2016) Three-phase PLLs: a review of recent advances. IEEE Trans Power Elect 32(3):1894–1907. https://doi.org/10.1109/TPEL.2016.2565642

    Article  Google Scholar 

  11. Golestan S, Guerrero JM, Vasquez JC (2017) Single-phase PLLs: a review of recent advances. IEEE Trans Power Elect 32(12):9013–9030. https://doi.org/10.1109/TPEL.2017.2653861

    Article  Google Scholar 

  12. Mkrtchyan G (2012) Operating characteristics of utility interactive inverters used in photovoltaic systems. California State University, Northridge

    Google Scholar 

  13. Ciobotaru M (2009) Reliable grid condition detection and control of single-phase distributed power generation systems. Aalborg University, Department of Energy Technology

    Google Scholar 

  14. Wang G, Liu X, Li Z, Xu S, Chen Z (2018) An adaptive grid voltage/frequency tracking method based on SOGIs on a shipboard PV–diesel-battery hybrid power system. Energies 11(4):732. https://doi.org/10.3390/en11040732

    Article  Google Scholar 

  15. Golestan S, Mousazadeh SY, Guerrero JM, Vasquez JC (2017) A critical examination of frequency-fixed second-order generalized integrator-based phase-locked loops. IEEE Trans Power Elect 32(9):6666–6672. https://doi.org/10.1109/TPEL.2017.2674973

    Article  Google Scholar 

  16. Golestan S, Guerrero JM, Vasquez JC, Abusorrah AM, Al-Turki Y (2018) Modeling, tuning, and performance comparison of second-order-generalized-integrator-based FLLs. IEEE Trans Power Elect 33(12):10229–10239. https://doi.org/10.1109/TPEL.2018.2808246

    Article  Google Scholar 

  17. Abdali Nejad S, Matas J, Elmariachet J, Martín H, de la Hoz J (2021) SOGI-FLL grid frequency monitoring with an error-based algorithm for a better response in face of voltage sag and swell faults. Electronics 10(12):1414. https://doi.org/10.3390/electronics10121414

    Article  Google Scholar 

  18. Hui N, Feng Y, Han X (2020) Design of a high performance phase-locked loop with DC offset rejection capability under adverse grid condition. IEEE Access 8:6827–6838. https://doi.org/10.1109/ACCESS.2020.2963993

    Article  Google Scholar 

  19. Sevilmiş F, Karaca H (2021) An effective solution to eliminate DC-offset for extracting the phase and frequency of grid voltage. Math Prob Eng. https://doi.org/10.1155/2021/9742683

    Article  Google Scholar 

  20. Sevilmiş F, Karaca H (2020) A fast hybrid PLL with an adaptive all-pass filter under abnormal grid conditions. Elect Power Syst Res 184:106303. https://doi.org/10.1016/j.epsr.2020.106303

    Article  Google Scholar 

  21. Kulkarni A, John V (2017) Design of a fast response time single-phase PLL with dc offset rejection capability. Elect Power Syst Res 145:35–43. https://doi.org/10.1016/j.epsr.2016.12.023

    Article  Google Scholar 

  22. Gautam S, Lu Y, Hassan W, Xiao W, Lu DD-C (2020) Single phase NTD PLL for fast dynamic response and operational robustness under abnormal grid condition. Elect Power Syst Res 180:106156. https://doi.org/10.1016/j.epsr.2019.106156

    Article  Google Scholar 

  23. Devassy S, Singh B (2017) Control of solar photovoltaic integrated UPQC operating in polluted utility conditions. IET Power Elect 10(12):1413–1421. https://doi.org/10.1049/iet-pel.2016.0999

    Article  Google Scholar 

  24. Golestan S, Guerrero JM, Gharehpetian GB (2015) Five approaches to deal with problem of DC offset in phase-locked loop algorithms: design considerations and performance evaluations. IEEE Trans Power Elect 31(1):648–661. https://doi.org/10.1109/TPEL.2015.2408113

    Article  Google Scholar 

  25. Xie M, Wen H, Zhu C, Yang Y (2017) DC offset rejection improvement in single-phase SOGI-PLL algorithms: methods review and experimental evaluation. IEEE Access 5:12810–12819. https://doi.org/10.1109/ACCESS.2017.2719721

    Article  Google Scholar 

  26. Sibanyoni M, Chowdhury SD, Ngoma L (2021) Single phase inverter fuzzy logic phase locked loop. Microgrid Technol. https://doi.org/10.1002/9781119710905.ch4

    Article  Google Scholar 

  27. Ferhatović N, Lale S, Kevrić J, Lubura S (2020) Implementation of single-phase phase-locked loop with DC offset and noise rejection using fuzzy logic controller. International symposium on innovative and interdisciplinary applications of advanced technologies, 2020. Springer, New York, pp 407–421

    Google Scholar 

  28. Pirnazar M et al (2018) The evaluation of the usage of the fuzzy algorithms in increasing the accuracy of the extracted land use maps. Int J Glob Environ Issues 17(4):307–321. https://doi.org/10.1504/IJGENVI.2018.095063

    Article  Google Scholar 

  29. Karimi-Ghartema M (2014) Enhanced phase-locked loop structures for power and energy applications. Wiley, Hoboken

    Book  Google Scholar 

  30. Hui N, Wang D, Li Y (2018) A novel hybrid filter-based PLL to eliminate effect of input harmonics and DC offset. IEEE Access 6:19762–19773. https://doi.org/10.1109/ACCESS.2018.2821704

    Article  Google Scholar 

  31. Ali Z, Christofides N, Hadjidemetriou L, Kyriakides E (2017) Design of an advanced PLL for accurate phase angle extraction under grid voltage HIHs and DC offset. IET Power Elect 11(6):995–1008. https://doi.org/10.1049/iet-pel.2017.0424

    Article  Google Scholar 

  32. Theristis M, Papazoglou IA (2013) Markovian reliability analysis of standalone photovoltaic systems incorporating repairs. IEEE J Photovolt 4(1):414–422. https://doi.org/10.1109/JPHOTOV.2013.2284852

    Article  Google Scholar 

  33. Kazmierkowski MP, Jasinski M, Wrona G (2011) DSP-based control of grid-connected power converters operating under grid distortions. IEEE Trans Ind Inform 7(2):204–211. https://doi.org/10.1109/TII.2011.2134856

    Article  Google Scholar 

  34. Shu K, Sánchez-Sinencio E (2006) CMOS PLL synthesizers: analysis and design. Springer, New York

    Google Scholar 

  35. Karimi-Ghartemani M, Khajehoddin SA, Jain PK, Bakhshai A, Mojiri M (2011) Addressing DC component in PLL and notch filter algorithms. IEEE Trans Power Elect 27(1):78–86. https://doi.org/10.1109/TPEL.2011.2158238

    Article  Google Scholar 

  36. Han Y, Luo M, Zhao X, Guerrero JM, Xu L (2015) Comparative performance evaluation of orthogonal-signal-generators-based single-phase PLL algorithms: a survey. IEEE Trans Power Elect 31(5):3932–3944. https://doi.org/10.1109/TPEL.2015.2466631

    Article  Google Scholar 

  37. Dorf RC, Bishop RH (2011) Modern control systems. Pearson, New York

    MATH  Google Scholar 

  38. Możdżyński K, Rafał K, Bobrowska-Rafał M (2014) Application of the second order generalized integrator in digital control systems. Arch Elect Eng 63:3

    Google Scholar 

  39. Kherbachi A, Bendib A, Kara K, Chouder A (2017) ARM based implementation of SOGI-FLL method for power calculation in single-phase power system. In: Proceedings of the 2017 5th international conference on electrical engineering-boumerdes (ICEE-B), 2017: IEEE, pp. 1–6. DOI: https://doi.org/10.1109/ICEE-B.2017.8192134

  40. Xin Z, Wang X, Qin Z, Lu M, Loh PC, Blaabjerg F (2016) An improved second-order generalized integrator based quadrature signal generator. IEEE Trans Power Elect 31(12):8068–8073. https://doi.org/10.1109/TPEL.2016.2576644

    Article  Google Scholar 

  41. Wang YF, Li YW (2011) Three-phase cascaded delayed signal cancellation PLL for fast selective harmonic detection. IEEE Trans Ind Elect 60(4):1452–1463. https://doi.org/10.1109/TIE.2011.2162715

    Article  Google Scholar 

  42. Golestan S, Ramezani M, Guerrero JM, Monfared M (2014) dq-frame cascaded delayed signal cancellation-based PLL: analysis, design, and comparison with moving average filter-based PLL. IEEE Trans Power Elect 30(3):1618–1632. https://doi.org/10.1109/TPEL.2014.2315872

    Article  Google Scholar 

  43. Ke C, Wu A, Bing C, Yi L (2016) Measuring and reconstruction algorithm based on improved second-order generalised integrator configured as a quadrature signal generator and phase locked loop for the three-phase AC signals of independent power generation systems. IET Power Elect 9(11):2155–2161. https://doi.org/10.1049/iet-pel.2015.0967

    Article  Google Scholar 

  44. Matas J, Martin H, de la Hoz J, Abusorrah A, Al-Turki YA, Al-Hindawi M (2017) A family of gradient descent grid frequency estimators for the SOGI filter. IEEE Trans Power Elect 33(7):5796–5810. https://doi.org/10.1109/TPEL.2017.2748920

    Article  Google Scholar 

  45. He X, Geng H, Yang G (2019) Reinvestigation of single-phase FLLs. IEEE Access 7:13178–13188. https://doi.org/10.1109/ACCESS.2019.2891973

    Article  Google Scholar 

  46. Ahmed H, Biricik S, Benbouzid M (2020) Low-pass filtering or gain tuning free simple DC offset rejection technique for single and three-phase systems. Elect Power Syst Res 186:106422. https://doi.org/10.1016/j.epsr.2020.106422

    Article  Google Scholar 

Download references

Funding

There was no funding.

Author information

Authors and Affiliations

  1. School of Electrical Engineering, Iran University of Science and Technology, Tehran, Iran

    Pourang Ardalan, Mohammad Zamani Khaneghah, Adib Abrishamifar & Masood Saeidi

  2. Department of Electrical and Computer Engineering, University of Mohaghegh Ardabili, Ardabil, Iran

    Navid Rasekh

Authors
  1. Pourang Ardalan
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Navid Rasekh
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. Mohammad Zamani Khaneghah
    View author publications

    You can also search for this author in PubMed Google Scholar

  4. Adib Abrishamifar
    View author publications

    You can also search for this author in PubMed Google Scholar

  5. Masood Saeidi
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding author

Correspondence to Navid Rasekh.

Ethics declarations

Conflict of interest

I declare that there is no conflict of interest in the publication of this article, and that there is no conflict of interest with any other author or institution for the publication of this article.

Ethical statements

I hereby declare that this manuscript is the result of my independent creation under the reviewers’ comments. Except for the quoted contents, this manuscript does not contain any research achievements that have been published or written by other individuals or groups. I am the only author of this manuscript. The legal responsibility of this statement shall be borne by me.

Rights and permissions

Reprints and permissions

About this article

Check for updates. Verify currency and authenticity via CrossMark

Cite this article

Ardalan, P., Rasekh, N., Khaneghah, M.Z. et al. A modified SOGI-FLL algorithm with DC-offset rejection improvement for single-phase inverter applications. Int. J. Dynam. Control 10, 2020–2033 (2022). https://doi.org/10.1007/s40435-022-00932-6

Download citation

  • Received:

  • Revised:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s40435-022-00932-6

Keywords

Search

Navigation