The CPE description
In [6, 11], the authors demonstrated the possibility of realizing a CPE by using Carbon Black (CB) and a polymeric matrix. More specifically, devices were realized using Sylgard, as the polymeric matrix, and CB as a dispersed filler. Nanostructured devices, named in the following CB-FOEs, were obtained. The CB-FOEs were fabricated by mixing the PDMS and a crosslinking agent, in a weight ratio of 1 : 10, in a Teflon crucible. Sylgard was purchased from DowCorning as a two part liquid elastomer kit. Part A (consisting in the vinyl-terminated PDMS prepolymer) was mixed with Part B (the crosslinking curing agent, consisting in a mixture of methylhydrosiloxane copolymer chains with a Pt catalyst and an inhibitor). CB (acetylene, 100% compressed, 99.9+%, specific area \(75 \,m^2/g\), bulk density \(170 \div 230 \, g/L,\) average particle size \(0.042\, \mu m\)) was purchased from AlfaAesar and used as received.
The mixture was mixed for \(10 \; min\). CB has been added for achieving the desired concentration. The mixture was stirred for further \(10 \; min\), for enhancing the dispersion of the CB.
Curing at different temperatures was carried out, taking into account both the manufacturer recommended curing time and the heat propagation through the mold. This resulted in a stabilization time, required for the temperature of the curing PDMS approaching the desired curing temperature. The mixture was used for realizing the dielectric of the capacitors by pouring the viscous mixture into copper-made electrodes. The mixture was allowed crosslinking at room temperature, or in an oven preheated to the desired temperature, for \(48 \; h\). More specifically cylindrical capacitors, whose geometry is shown in Fig. 2, were realized.
The capacitor considered in the following has height \(h=8 \; cm\), internal diameter \(a=0.6 \; cm\) and the external one \(b=1.2 \; cm\).
A detailed description of the realization procedure for the aforementioned device is given in [6].
The results reported in [6, 11] allows to foresee a dependence of the order \(\alpha \) from the curing temperature and, therefore, the possibility of controlling, by design, the of non-integer coefficient. In particular, among the different curing temperature values and percentages of CB diffused inside the dielectrics, in this paper the CPE obtained with a curing temperature of \(130^\circ \; C\) and a CB percentage equal to \(2 \;\%\) has been taken into account.
In Fig. 3, the Bode diagram of the impedance of the considered FOE is reported. The diagram has been obtained by using a spectrum analyzer Keysight Technologies E5061B.
Looking at the frequency range \(\left[ 1,1000\right] \, kHz\), both the slope of the magnitude diagram and the value of the phase lag give evidence of the fractional nature of the device.
An identification procedure has been performed, in the frequency range mentioned above, to model the capacitor as (3). The following values, \(C = 2.2 \; nF/s^{1-\alpha }\) and \(\alpha = 0.82\), have been obtained, see Fig. 4. They will be used in the following of the paper.
It is possible to argue that at the very low frequencies (lower than 5Hz) resistive behaviors prevail. This is probably due to leakage resistances and, hence, the proposed device does not act as a CPE for frequencies lower than \(1 \, kHz\). Moreover, in the investigated frequency range, the phase variation in the flat area is about \(\sim \pm 5 \, deg\). It was not possible to investigate frequencies larger than those reported in Fig. 3, because of instrument limitations.
Tough devices obtained with the described technology have been used for years, no significant changes have observed in their electrical characteristics, giving evidence of stability.
A fractional-order RLC series circuit was realized by using the CB-FOE device. Commercial inductor,(i.e., with \(\beta = 1\)), and resistance were used for the circuit realization. The circuit, shown in Fig. 5, has been realized with a resistor \(R = 1 \, k\Omega \), an inductor with a nominal value \(L = 47 \, mH\) and \(\beta =1\), and the aforementioned \(CB-FOE\) fractional-order capacitor with \(C = 2.2 \; nF/s^{1-\alpha }\) and \(\alpha = 0.82\).
The FO-RLC model identification
An ideal FO-RLC circuit of Fig. 1 has been proposed as model for the real circuit depicted in Fig. 5, without considering any parasitic effects. The Bode diagrams of the real circuit and the proposed nominal model, obtained by exploiting the parameters defined before, are shown in Fig. 6.
As it is possible to notice, the nominal model is not able to fit the real response of the circuit. Further investigations on each components have been performed in order to build a more reliable model.
The FO-RLC complete model identification
The other two components of the circuit (i.e. resistor and inductor) have been deeply analyzed in order to consider any parasitic effects (if present) or to use more accurate real value of their impedances.
Firstly, the response of the resistance R has been measured with a digital multimeter and it is equal to \(R_{real} = 997.6 \; \Omega \).
In order to deal with the parasitic components of the inductor, an Equivalent Electric Circuit Model (EECM) has been identified. The schematic of the EECM is reported in Fig. 7, while in Table 1 parameters of the model are reported.
Table 1 Parameters of the inductor EECM The identified frequency response of the inductor is compared with experimental measurements in Fig. 8. From the dot-marked line, it is quite evident the presence of a resonance peak, at about \(250 \; kHz\), due to inductor parasitic components.
The global fractional-order RLC circuit has been obtained by the series connection of the resistance \(R_{real}\), the capacitance \(C^\alpha \) and the ECCM of the inductor.
Figure 9 shows the comparison between the frequency response of the fractional-order RLC circuit model with that of the real circuit, highlighting a well-performed identification procedure that allows to model the real behavior of the system under investigation.
Discussion and model validation
Looking at Fig. 9, it is possible to notice that the FO-RLC circuit, as expected, has a resonant peak. This occurs at about \(50 \; kHz\). The parasitic effects produce an undesired anti-resonant like effect at \(250 \; kHz\). Such parasitic effects are responsible for discrepancies that can be observed in the high-frequency range for both the module and the phase graphs shown in Fig. 6.
Based on such consideration, further investigation are limited up to \(100 \; kHz\). More specifically, three different sinusoidal tones, the first one at \(10 \; kHz\), the second one at \(50 \; kHz\) and the last at \(100 \; kHz\), have been chosen as forcing inputs to the circuit. The first tone was intended for investigating the behavior of the circuit at low frequencies, the second one to evaluate the response in the neighborhood of the resonance frequency, while the third tone was used for investigating the circuit at frequencies higher than the circuit resonance frequency. Both the model simulation and the experimental investigation of the fractional-order RLC circuit, at these three tones, will shown in the following.
Table 2 Maximum deviation values Table 3 Parameters for different responses The acquired responses and the corresponding model simulations are shown in Figs. 10, 11 and 12. It is possible to notice that, at both the lowest and the highest considered frequency values, the model simulations are in agreement with the experimental results, while, at \(50 \; kHz\) the amplitude of the real circuit output is higher than the simulated one. This discrepancy is due to a imperfect fit between real and equivalent model. Looking at Fig. 9, in correspondence of \(f = 50 \; kHz\), a module difference of almost \(2 \; dB\) can be detected and such a difference justifies the variation of about \(0.2 \; V\).
This variation is further confirmed by the error values for the Bode diagrams in the interval \([1,100] \; kHz\). The obtained values, along with the corresponding frequency values, are reported in the Table 2. Frequencies close to the circuit resonance frequency are obtained. Finally, the real Bode diagram allows to validate the identified order \(\alpha \) of the fractional-order capacitor because the circuit asymptotic value is almost equal to the one of the simulated model.
In Table 3 different parameters characterizing the Bode diagrams, the sinusoidal, and step responses have been evaluated for the real and simulated fractional-order RLC circuit respectively. The values obtained for the corresponding integer order RLC circuit (i.e., same R, L and C values, and \(\alpha = 1\)) are also reported in the table for the sake of comparison.
The step response has been also investigated, see Fig. 13. Although the pseudo-periods of the oscillation, both for the real and the simulated responses, do not show relevant differences, the simulated response is more dumped than the real one: this phenomenon is justified by analyzing the Bode diagram of Fig. 9, where, in correspondence of the peak resonance, the real module is slightly higher than the simulated one.
The values presented in the table outline the dependence of the non-integer-order RLC parameters on the non-integer-order value \(\alpha \). In the following, evidence will be given of the role of the fractional nature of the capacitor in the obtained circuits behavior. More specifically, the investigation will be performed for the case of the high frequency phase lag. In this investigation the parasitic effects of the inductor are neglected. The following notation has been adopted: IO indicates the integer-order RLC circuit, FO-S is used for the simulated fractional-order RLC circuit, and FO-R for the real fractional-order RLC circuit.
More specifically, for \(\alpha =0.82\) the corresponding asymptotic value, estimated according to 17, is \(-163.8 \deg \). The values reported in Table 3 are in agreement with the analytical estimation.
Results obtained during the model identification and validation show that the adopted linear model is a good approximation of the device real behavior for the investigated working condition.