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Formal verification of a software countermeasure against instruction skip attacks


Fault attacks against embedded circuits enabled to define many new attack paths against secure circuits. Every attack path relies on a specific fault model which defines the type of faults that the attacker can perform. On embedded processors, a fault model consisting in an assembly instruction skip can be very useful for an attacker and has been obtained by using several fault injection means. To avoid this threat, some countermeasure schemes which rely on temporal redundancy have been proposed. Nevertheless, double fault injection in a long enough time interval is practical and can bypass those countermeasure schemes. Some fine-grained countermeasure schemes have also been proposed for specific instructions. However, to the best of our knowledge, no approach that enables to secure a generic assembly program in order to make it fault-tolerant to instruction skip attacks has been formally proven yet. In this paper, we provide a fault-tolerant replacement sequence for almost all the instructions of the Thumb-2 instruction set and provide a formal verification for this fault tolerance. This simple transformation enables to add a reasonably good security level to an embedded program and makes practical fault injection attacks much harder to achieve.

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  1. It turns out that, in the ARM calling conventions, the r12 register can be used to hold intermediate values and does not need to be saved on the stack. Thus, this register can be used, if available, as a temporary register for such replacement scenarios.

  2. stmdb stores multiple registers into the memory and decrements the address before each access.

  3. ldmia loads a memory segment into multiple registers and increments the address after each access.

  4. A register is alive at a given point in an instructions sequence if there is a path to the end in which it is read before being written.



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Correspondence to N. Moro or K. Heydemann.

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Moro, N., Heydemann, K., Encrenaz, E. et al. Formal verification of a software countermeasure against instruction skip attacks. J Cryptogr Eng 4, 145–156 (2014).

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  • Microcontroller
  • Fault attack
  • Instruction skip
  • Countermeasure
  • Formal verification