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Revisiting the ECM-KEEM protocol with Vedic multiplier for enhanced speed on FPGA platforms

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Abstract

The rapid deployment of software, such as online banking, stock trading and corporate remote access, has seen tremendous growth in the amount of sensitive data shared over the internet in recent years. In addition, these internet hosts are predominantly battery-powered, portable, handheld devices with stringent memory, CPU, latency and bandwidth limitations. This paper discusses the design of modern elliptic curve cryptographic (ECC) high-speed architecture using field-programmable gate array (FPGA) technique for elliptic curve based multi level key exchange and encryption mechanism (ECM-KEEM) protocol. Different safety levels are applied to the data path to investigate the outcome of the results and to find maximum protection for the higher bits of data. Three complex security algorithms are used to upgrade the mathematical hardness of the designed system by incorporating the novel functions for secret key exchange. The field arithmetic in the prime field curve secp256k1 used in the designed architecture achieves a time period of 0.3 microseconds and 0.8 microseconds by conventional multipliers and Vedic multipliers respectively on various Xilinx Virtex-6 FPGA platform. Alongside the same design is implemented and analyzed with Virtex-7 and Kintex-7 platforms for the better performance to verify the improved implementation efficiency with Vedic multiplier based design. The latest trends in the e-gadgets needs an effective, scalable security mechanisms and protocols with efficient hardware architecture are clearly needed that function well in both wired and wireless environments.

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References

  • Afreen R, Mehrotra S (2011) A review on elliptic curve cryptography for embedded systems. arXiv preprint arXiv:1107.3631

  • Benselama ZA, Bencherif MA, Khorissi N, Bencherchali MA (2014) Low cost reconfigurable elliptic crypto-hardware. In: 11th international conference on computer systems, applications (AICCSA), IEEE/ACS, pp 788–792

  • Fan J, Sakiyama K, Verbauwhede I (2008) Elliptic curve cryptography on embedded multicore systems. Des Autom Embed Syst 12:231–242

    Article  Google Scholar 

  • Ghosh S, Mukhopadhyay D, Roychowdhury D (2011) PETREL: power and timing attack resistant elliptic curve scalar multiplier based on programmable GF(p) arithmetic unit. IEEE Trans Circuits Syst I Regul Pap 58(8):1798

    Article  MathSciNet  MATH  Google Scholar 

  • Hankerson D, Menezes A, Vanstone S (2004) Guide to elliptic curve cryptography. Springer

    MATH  Google Scholar 

  • Hazmi IH, Zhou F, Gebali F, Al-Somani TF (2015) Review of elliptic curve processor architectures. In: 2015 IEEE Pacifc Rim conference on communications, computers and signal processing (PACRIM), (IEEE), pp 192–200

  • Hossain MS, Kong Y, Saeedi E, Vayalil NC (2016) High-performance elliptic curve cryptography processor over NIST prime fields. IET Comput Digit Tech 11(1):33

    Article  Google Scholar 

  • Karthikeyan E (2012) Survey of elliptic curve scalar multiplication algorithms. Int J Adv Netw Appl 4(2):1581

    Google Scholar 

  • Kudithi T, Sakthivel R (2019) High-performance ECC processor architecture design for IoT security applications. J Supercomput 75:447–474

    Article  Google Scholar 

  • Law L, Menezes A, Qu M, Solinas J, Vanstone SA (2003) An efficient protocol for authenticated key agreement. Des Codes Cryptogr 28(2):119–134

    Article  MathSciNet  MATH  Google Scholar 

  • Lin MB (2008) Digital system designs and practices: using Verilog HDL and FPGAs. Wiley, Singapore

    Google Scholar 

  • Loi KC, Ko SB (2018) Flexible elliptic curve cryptography coprocessor using scalable finite field arithmetic blocks on FPGAs. Microprocess Microsyst 63:182–189

    Article  Google Scholar 

  • Marzouqi H, Al-Qutayri M, Salah K (2015) Review of elliptic curve cryptography processor designs. Microprocess Microsyst 39(2):97

    Article  Google Scholar 

  • McIvor CJ, McLoone M, McCanny JV (2006) Hardware elliptic curve cryptographic processor over rm GF(p). IEEE Trans Circuits Syst I Regul Pap 53(9):1946–1957

    Article  MathSciNet  MATH  Google Scholar 

  • Menezes AJ, van Oorschot PC, Vanstone SA (2001) Handbook of applied cryptography. CRC Press

    MATH  Google Scholar 

  • Pavan Kumar UCS (2013) FPGA implementation of high speed 8-bit Vedic multiplier using barrel shifter. IEEE Trans Circuit Syst 4:45–51

    Google Scholar 

  • Poomagal CT, Sathish Kumar GA, Deval M (2020) Multi level key exchange and encryption protocol for Internet of Things (IoT). Comput Syst Sci Eng 35(1):51–63

    Article  Google Scholar 

  • Rebeiro C, Selvakumar D, Devi ASL (2006) Bitslice implementation of AES. In: Pointcheval D, Mu Y, Chen K (eds) Cryptology and network security. CANS 2006. LNCS, vol 4301, pp 203–212

  • Sakiyama K, Mentens N, Batina L, Preneel B, Verbauwhede I (2006) Reconfigurable modular arithmetic logic unit for high-performance public-key cryptosystems. In: International workshop on applied reconfigurable computing, Springer, pp 347–357

  • Sheshavali C (2012) Design and implementation of Vedic multiplier. Elsevier Publ on Solid State Electron 8(6):23–28

    Google Scholar 

  • Song B, Kim K (2000) Two-pass authenticated key agreement protocol with key confirmation. In: Proc. Indocrypt’00, LNCS, vol 1977, pp 237–249

  • Strangio MA (2005) Efficient Diffie–Hellmann two-party key agreement protocols based on elliptic curves. In: Proc. 20th ACM symposium on applied computing (SAC), pp 324–331

  • Vliegen J, Mentens N, Genoe J, Braeken A, Kubera S, Touhaf A, Verbauwhede I (2010) A compact FPGA-based architecture for elliptic curve cryptography over prime fields. In: 2010 21st IEEE international conference on application-specific systems architectures and processors (ASAP), IEEE, pp 313–316

  • Wang S, Cao Z, Strangio MA, Wang L (2008) Cryptanalysis and improvement of an elliptic curve Diffie–Hellman key agreement protocol. IEEE Commun Lett 12(2):149–151

    Article  Google Scholar 

  • Xilinx Inc (2015) Virtex-6 family overview, pp 1–9. http://www.xilinx.com

Download references

Acknowledgements

This work was supported by Indian Space Research Organization(ISRO) under the RESPOND scheme of Projects with the Grants no: ISRO/RES/3/750/17–18.

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Correspondence to C. T. Poomagal.

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Poomagal, C.T., Sathish Kumar, G.A. & Mehta, D. Revisiting the ECM-KEEM protocol with Vedic multiplier for enhanced speed on FPGA platforms. J Ambient Intell Human Comput 14, 3475–3485 (2023). https://doi.org/10.1007/s12652-021-03480-7

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